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There are two principal mechanisms but first a diagram:

enter image description hereenter image description here

Body and source are tied together, and several features are removed for simplicity.

Scenario 1:

  • Over voltage spike on Drain, causing filaments and the contacts and drain implants to be spiked. IT may or may not have causes the contacts to fail/melt but very high currents can cause breakdown of the D/B junction. Once the junction is spiked it is connected to the well drain and source are now shorted. This only requires breakdown at one location in the transistors

Scenario 2:

  • HIgh voltage on drain, causing EOS (Electrical Over stress) on the GOX (Gate Oxide) particularly on the gate nearest the drain. Very likely this is a LDMOS structure with an extended drain structure (which means the gate voltage need not get to the same voltage as the drain ever). Breakdown at that end of the gate can cause the gate to short to drain. Once it is shorted, it now is essentially on always, but also, the gate now gets driven to levels it wasn't intended to be at and the failure runs away. THis still only requires one fault in the transistor.

There are other scenarios but they all require two faults.

This device is fairly large and will be visible under a microscope. De-lidding this might be instructive.

There are two principal mechanisms but first a diagram:

enter image description here

Body and source are tied together, and several features are removed for simplicity.

Scenario 1:

  • Over voltage spike on Drain, causing filaments and the contacts and drain implants to be spiked. IT may or may not have causes the contacts to fail/melt but very high currents can cause breakdown of the D/B junction. Once the junction is spiked it is connected to the well drain and source are now shorted. This only requires breakdown at one location in the transistors

Scenario 2:

  • HIgh voltage on drain, causing EOS (Electrical Over stress) on the GOX (Gate Oxide) particularly on the gate nearest the drain. Very likely this is a LDMOS structure with an extended drain structure (which means the gate voltage need not get to the same voltage as the drain ever). Breakdown at that end of the gate can cause the gate to short to drain. Once it is shorted, it now is essentially on always, but also, the gate now gets driven to levels it wasn't intended to be at and the failure runs away. THis still only requires one fault in the transistor.

There are other scenarios but they all require two faults.

This device is fairly large and will be visible under a microscope. De-lidding this might be instructive.

There are two principal mechanisms but first a diagram:

enter image description here

Body and source are tied together, and several features are removed for simplicity.

Scenario 1:

  • Over voltage spike on Drain, causing filaments and the contacts and drain implants to be spiked. IT may or may not have causes the contacts to fail/melt but very high currents can cause breakdown of the D/B junction. Once the junction is spiked it is connected to the well drain and source are now shorted. This only requires breakdown at one location in the transistors

Scenario 2:

  • HIgh voltage on drain, causing EOS (Electrical Over stress) on the GOX (Gate Oxide) particularly on the gate nearest the drain. Very likely this is a LDMOS structure with an extended drain structure (which means the gate voltage need not get to the same voltage as the drain ever). Breakdown at that end of the gate can cause the gate to short to drain. Once it is shorted, it now is essentially on always, but also, the gate now gets driven to levels it wasn't intended to be at and the failure runs away. THis still only requires one fault in the transistor.

There are other scenarios but they all require two faults.

This device is fairly large and will be visible under a microscope. De-lidding this might be instructive.

Source Link
placeholder
  • 30.3k
  • 10
  • 64
  • 111

There are two principal mechanisms but first a diagram:

enter image description here

Body and source are tied together, and several features are removed for simplicity.

Scenario 1:

  • Over voltage spike on Drain, causing filaments and the contacts and drain implants to be spiked. IT may or may not have causes the contacts to fail/melt but very high currents can cause breakdown of the D/B junction. Once the junction is spiked it is connected to the well drain and source are now shorted. This only requires breakdown at one location in the transistors

Scenario 2:

  • HIgh voltage on drain, causing EOS (Electrical Over stress) on the GOX (Gate Oxide) particularly on the gate nearest the drain. Very likely this is a LDMOS structure with an extended drain structure (which means the gate voltage need not get to the same voltage as the drain ever). Breakdown at that end of the gate can cause the gate to short to drain. Once it is shorted, it now is essentially on always, but also, the gate now gets driven to levels it wasn't intended to be at and the failure runs away. THis still only requires one fault in the transistor.

There are other scenarios but they all require two faults.

This device is fairly large and will be visible under a microscope. De-lidding this might be instructive.