Timeline for Help me improve my PCB design
Current License: CC BY-SA 4.0
27 events
| when toggle format | what | by | license | comment | |
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| Oct 29, 2022 at 21:00 | history | tweeted | twitter.com/StackElectronix/status/1586462899052191745 | ||
| Oct 24, 2022 at 13:28 | vote | accept | Just doin Gods work | ||
| Oct 23, 2022 at 8:59 | history | edited | ocrdu | CC BY-SA 4.0 |
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| Oct 23, 2022 at 7:25 | answer | added | Nedd | timeline score: 2 | |
| Oct 22, 2022 at 17:34 | history | became hot network question | |||
| Oct 22, 2022 at 17:15 | comment | added | Just doin Gods work | @winny Added Schematic files links of nRF52810 | |
| Oct 22, 2022 at 17:14 | history | edited | Just doin Gods work | CC BY-SA 4.0 |
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| Oct 22, 2022 at 16:58 | comment | added | Just doin Gods work | @Tyler I used 0.254 mm, for each track I have designed. The one used for nRF52810 chip is 0.2 which used in the reference circuit. Also those pins are pretty close can't go higher than that. | |
| Oct 22, 2022 at 16:53 | comment | added | winny | Please post schematic if you can. ICs often come with decoupling guidelines but many sub circuits you design still comes with decoupling requirements. Is your top plane pour Vcc? Also, why so wide PCB? You have quite some space in the middle. | |
| Oct 22, 2022 at 16:49 | comment | added | Just doin Gods work | @winny Ground plane is breaking bottom layer because of long track: So I can shorten the track as bottom to cross over the anything on top layer and use rest of the track on the top layer only. I'll spend more time for better component placement. I only followed decoupling capacitors positions as per refrence only, so I think its the best | |
| Oct 22, 2022 at 16:48 | comment | added | Tyler | How wide are your traces? | |
| Oct 22, 2022 at 16:47 | comment | added | Just doin Gods work | @Nedd 1. I used resitor in EPD lines because I also want the EPD to seperate from the rest of the circuit, so i'll be able to directly run EPD through another ecternal driver circuit just in case. 2. The antenna clearance deatils willbe mentiaoned in nRF52810 datasheet? 3. I'll increase the clearance of via of DIn and SCK. By this I understood is there should be GND copper pour around those vias. 4. Swapping D3 and D4 was so obvious after you mentioned, so I think I need to observe more about the component placements. Thanks a lot, I got some direction to look at now. | |
| Oct 22, 2022 at 15:05 | comment | added | Just doin Gods work | @Justme Circuit design for now I follow the references and try to understand the reason for it. For Schematic design as in the representation of circuit if you meant, for these projects the schematic won't affect the functioning I guess but if you see anything wrong in the above schematic, please tell me I'll appreciate it. But mainly I'm only looking for PCB design that will affect the functioning of the circuit and will require PCB manufacturing again and again. I can't afford that. | |
| Oct 22, 2022 at 12:08 | review | Close votes | |||
| Oct 28, 2022 at 3:06 | |||||
| Oct 22, 2022 at 12:00 | answer | added | feynman | timeline score: 3 | |
| Oct 22, 2022 at 11:55 | comment | added | Nedd | Less than ideal trace connections to L4, R1, C15, C19. Swap positions of D2 & D3 plus rotate both 180. Route TX trace to front of X6 instead of under 0 ohm resistor (if used). Be sure to run a design check, at least one unrouted connection visible. [That's all for now] | |
| Oct 22, 2022 at 11:42 | comment | added | winny | You are breaking up your bottom ground pour with long traces, effectively weaken it a lot. If your switch/strobe/clock frequency is low enough and everything have strong local decoupling, you can probably get away with it. If not, try to avoid long traces on that layer by routing most of it on top layer and only use short tracks on bottom when you need to cross something on top layer. “Stitching” the track via top and bottom, while avoiding bottom. Even better, try to do floorplanning of parts, where and on which sides to avoid long tracks all together. How does your decoupling situation look? | |
| Oct 22, 2022 at 11:14 | comment | added | Nedd | Widen the clearance space between the traces and vias of DIN and SCK signals (to the right of the resistor positions) to prevent creating the isolated island that then needs another via. | |
| Oct 22, 2022 at 11:05 | comment | added | Justme | @JustdoinGodswork Do you want only PCB design advice? Or also schematic design advice? Or circuit design advice? Because not all things are only about designing the PCB. | |
| Oct 22, 2022 at 10:57 | comment | added | Just doin Gods work | @Justme i understand your point but as beginner even after reading some points regarding PCB design, I want some expert general opinions on PCB design, which I'll implement from next time onwards. Point like GND via, Close position of Decoupled capacitor, no ground copper Pour other side of antenna I found while last time showing my PCB design to an expert. So I want similar of those advice with respect to actual example. | |
| Oct 22, 2022 at 10:50 | comment | added | Nedd | It might be helpful to slide the X5 and X6 connections further away from the antenna traces, The chip mfg might have recommended clearances for placing other components near the antenna traces. As for the antenna itself, be sure to follow the mfgr's details for shape, layering, and size as accurately as possible. | |
| Oct 22, 2022 at 10:29 | comment | added | Nedd | Instead of adding 0 ohm resistors (each with 2 pads and a component placement) to create a test point why not just add a small SMD SIP header along the group of traces? You wouldn't need to install the header component and you would have a single open pad for a test point. (There may actually be single pin test point components in your available component library.) | |
| Oct 22, 2022 at 10:21 | comment | added | Justme | Design review questions are very open-ended and don't necessarily have one right answer or there can be different opinion based answers. How do you decide which answer is most correct in such case? Your question does have multiple specific points which you want answered, but some of them are unrelated to each other. | |
| Oct 22, 2022 at 10:08 | history | edited | JRE | CC BY-SA 4.0 |
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| Oct 22, 2022 at 10:02 | history | edited | Just doin Gods work | CC BY-SA 4.0 |
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| Oct 22, 2022 at 10:00 | comment | added | Just doin Gods work | ah okay, so improve? | |
| Oct 22, 2022 at 9:30 | history | asked | Just doin Gods work | CC BY-SA 4.0 |