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S Mar 14, 2023 at 20:17 vote accept InBedded16
Mar 14, 2023 at 20:05 vote accept InBedded16
S Mar 14, 2023 at 20:17
Mar 14, 2023 at 9:00 answer added Simon Fitch timeline score: 1
Mar 14, 2023 at 7:46 answer added sai timeline score: 0
Mar 14, 2023 at 0:36 answer added TimWescott timeline score: 1
Mar 14, 2023 at 0:06 answer added Criticizing Israel not allowed timeline score: 1
Mar 13, 2023 at 21:37 comment added InBedded16 @JRE Oh. Yes okay I was thinking about this all wrong. I see that symbol is just a connection - not GND - so adding a voltage source with the bottom node being the positive rail will get me on track? Adding that to the example #2 schematic does give me 2A out now which is certainly closer.
Mar 13, 2023 at 21:35 history edited ocrdu CC BY-SA 4.0
deleted 158 characters in body; edited title
Mar 13, 2023 at 21:33 answer added Andy aka timeline score: 4
Mar 13, 2023 at 21:30 comment added JRE Don't you have both ends of the FET connected to ground in the simulation?
Mar 13, 2023 at 21:28 history edited JRE CC BY-SA 4.0
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Mar 13, 2023 at 21:23 history asked InBedded16 CC BY-SA 4.0