Timeline for LTspice simulation of a fluxgate excitation circuit with H bridge driver, Op-Amp and comparator not behaving as expected
Current License: CC BY-SA 4.0
7 events
when toggle format | what | by | license | comment | |
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May 17, 2023 at 13:12 | vote | accept | Zhi | ||
May 15, 2023 at 18:18 | answer | added | Ste Kulov | timeline score: 1 | |
May 15, 2023 at 9:35 | comment | added | Zhi | @SteKulov I changed it, but it is still the same. I think there might be some kind of compatibility issue when using PSpice models in LTspice. I simulated the same circuit with a more suitable op-amp in TINA-TI spice, and it shows expected behavior. | |
May 13, 2023 at 17:47 | comment | added | Ste Kulov |
Do you get any behavior change if you change A1 to a buf , run the comparator output into it, and then run both outputs of the buf into the DRV8837?
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May 13, 2023 at 13:50 | comment | added | Zhi | @SteKulov Yes, I did, Vhigh = 5V for A1 | |
May 12, 2023 at 18:38 | comment | added | Ste Kulov |
Did you set Vhigh for component A1?
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May 12, 2023 at 17:09 | history | asked | Zhi | CC BY-SA 4.0 |