Timeline for In verilog, what effect does the not (!) operator have on high impedance and don't care conditions?
Current License: CC BY-SA 3.0
5 events
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| May 2, 2013 at 5:16 | comment | added | Tim |
I believe that 8'hXF will reduce to true for purposes of logical operation, but it's probably not a good idea to use multi-bit values in a logical operation (will probably give lint or synthesis warnings).
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| May 2, 2013 at 5:02 | vote | accept | Caustic | ||
| May 2, 2013 at 5:02 | comment | added | Caustic |
Also, 1-bit signals makes sense for the logical vs bitwise and, but for example, what would the behavior of 8'hXF && 8'hFF be? I'm assuming that this evaluates to true since there are non-zero bits in the first operand. Is this correct?
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| May 2, 2013 at 4:56 | comment | added | Caustic | Ah thank you! I just figured it out. I wasn't forcing a signal that I should have been on the input. I was still uncertain of the behavior | |
| May 2, 2013 at 4:41 | history | answered | Tim | CC BY-SA 3.0 |