Timeline for Custom i2c with Arduino UNO
Current License: CC BY-SA 4.0
7 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Sep 30, 2023 at 23:23 | history | became hot network question | |||
| Sep 30, 2023 at 17:54 | comment | added | Chester Gillon | Continued. If it helps i2c_bit_banged.c is the source code for the bit-banged driver which was created for the above board, which runs under Linux on a x86-64 processor rather than an Arduino. Given the relatively fast processor, the driver inserts the delays from the I2C spec. | |
| Sep 30, 2023 at 17:51 | comment | added | Chester Gillon | I was looking at a design where the I2C bus interface available to a FPGA was actually 2 output and 1 input pins, with a CPLD on the board connecting the 3 pins on the FPGA to the actual SCL and SDA signals connected to other I2C devices on the board. As per I2C SCL from CPLD is push-pull rather than open-collector this lead to some restrictions on use of I2C. | |
| Sep 30, 2023 at 16:31 | vote | accept | Anton Tsvayer | ||
| Sep 30, 2023 at 16:17 | comment | added | user319836 | The NXP I2C specification was originally written before dedicated hardware was available. Bit-banging a GPIO is the original way it was done, | |
| Sep 30, 2023 at 15:29 | answer | added | Justme | timeline score: 2 | |
| Sep 30, 2023 at 15:23 | history | asked | Anton Tsvayer | CC BY-SA 4.0 |