Timeline for Why do we use this capacitor in the opamp and why do we superimpose it on the DC voltage and then destroy it again with the capacitor?
Current License: CC BY-SA 4.0
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| Nov 6, 2023 at 14:16 | comment | added | bevren15 | @AnalogKid - You have created new question marks in my head :) You say that since these circuits are AC-coupled, the DC offset gain is 1. First of all, by looking at which elements did you understand that it is AC-coupled, how can I understand this? Secondly, by looking at which elements did you understand that the DC offset gain is 1? And for example, what should be added where for the DC offset gain to be 2? | |
| Nov 6, 2023 at 14:00 | comment | added | AnalogKid | First bullet point: Both stages are AC-coupled, as would be a single stage with a gain of 100. In both cases, the circuit at DC is a voltage follower with a gain of 1, not 10 or 100, so the effect of input offset voltage on the output would be very small or negligible. | |
| Nov 6, 2023 at 13:57 | comment | added | SamGibson♦ | @bevren15 - Re: "I have updated/added questions 2, 7, 8 and 9". Please see my comments under your question. Expanding the question, now that it has received answers, is not allowed as it leads to a "chameleon question" situation. Therefore your question has been rolled-back to it's earlier state. | |
| Nov 6, 2023 at 13:39 | comment | added | bevren15 | You really enlightened me. Thank you very much. I guess I have a few last question marks left in my head. I have updated/added questions 2, 7, 8 and 9. If you have any answers, I look forward to hearing them. (If I can get answers to these, I think this circuit will be well established in my mind and I think it has been very instructive for those who examine this question). | |
| Nov 6, 2023 at 12:23 | comment | added | Simon Fitch | @bevren15 secondary current should have zero average, no long-term offset. Any offset appearing at the output of U1.1 will be due to op-amp input offset voltage, and will be cancelled by C4. Due to C4, any permanent offset at the output of U1.2 is due entirely to U1.2 input voltage offset, not from anything prior. | |
| Nov 6, 2023 at 12:17 | comment | added | Simon Fitch | @bevren15 Not sure why C1. With or without it, the output's centered about the potential at the junction of R2/R3, 2.5V. R2/R3 needed to bias the input and output at 2.5V average, so that negative swings of the input don't get clipped by the op-amp unable to output less than zero, and the input is also within the acceptable range. | |
| Nov 6, 2023 at 11:24 | vote | accept | bevren15 | ||
| Nov 6, 2023 at 10:11 | comment | added | bevren15 | Also, what I wanted to ask in question 1 was this: If we did not overlay the signal on 2.5V, that is, if we did not make the voltage divider with resistors R3 and R2, would it not work? We are already doing this operation in the second opamp. If there is any offset in C4, it already resets. Why did we use R3 and R2? | |
| Nov 6, 2023 at 9:44 | comment | added | bevren15 | Again in your 3rd answer, you mentioned the saturation of the core of the transformer. This is a current transformer. So it transmits the current in a constant way. Does voltage really affect the saturation of this transformer? And since we are talking about the AC Main line entering, what do you think C1 could be doing? | |
| Nov 6, 2023 at 9:43 | comment | added | bevren15 | I really appreciate your long explanation. It is my fault for not writing that this circuit is designed to measure AC Main voltages between 50Hz and 80-250V and to be read from an MCU like Arduino. Does the answer to question 2 change accordingly? Because those capacitors don't make sense to me either. I wondered if it was something like an integrator, but I couldn't get it. And again according to this information, is the 0.1V offset error you mentioned in item 1 of your 3rd answer still possible on an AC Main line? | |
| Nov 6, 2023 at 9:16 | history | edited | Simon Fitch | CC BY-SA 4.0 |
added 300 characters in body
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| Nov 6, 2023 at 9:08 | history | answered | Simon Fitch | CC BY-SA 4.0 |