Timeline for I2C level shifter isolation
Current License: CC BY-SA 4.0
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Jan 25 at 11:12 | comment | added | kaosad | Actually you can omit the PNP. You just need 1 capacitor and 2 resistors. The turn OFF period of the voltage shifter would be around 25usec (from my simulation). You can use 0201 (0.6mm * 0.3mm) capacitors and resistors if you are concern with the area occupied. You can pack them nicely and that would be roughly the size of the DMN2991UDR4. Also note that you need only one set to control all the voltage level shifters. | |
Jan 25 at 10:16 | comment | added | electroeso | Thank you so much. This PNP solution is very logical but not simple from my perspective (size and area are big issues for this design). I may use it if can't find a better solution. | |
Jan 25 at 9:18 | history | edited | kaosad | CC BY-SA 4.0 |
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Jan 25 at 8:23 | history | edited | kaosad | CC BY-SA 4.0 |
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Jan 25 at 8:03 | history | edited | kaosad | CC BY-SA 4.0 |
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Jan 25 at 7:58 | comment | added | kaosad | I edited again because I forgot that the FPGA_Ctrl pin must float when powered down. | |
Jan 25 at 7:56 | history | edited | kaosad | CC BY-SA 4.0 |
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Jan 25 at 7:30 | comment | added | kaosad | If you can spare an I/O pin then you can use my new circuit. I have updated my answer. | |
Jan 25 at 7:29 | history | edited | kaosad | CC BY-SA 4.0 |
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Jan 24 at 22:32 | comment | added | electroeso | Huge thank you for your answer. Unfortunately, you're missing a point. 1.8V side will be floating for a bit of time up to when the FPGA power-up sequence is done. Not grounding. Meanwhile, MCU will configure PMIC, so this means 3.3V is active before FPGA's 1.8V VCCIO rail, and isolating any voltage from FPGA IOs is critical. Because of simulating this scenario, I put a huge resistor on the 1.8V side. Because LTspice is ridiculous if you actually leave any node floating. | |
Jan 24 at 20:26 | history | edited | kaosad | CC BY-SA 4.0 |
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Jan 24 at 18:29 | history | edited | kaosad | CC BY-SA 4.0 |
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Jan 24 at 18:24 | history | answered | kaosad | CC BY-SA 4.0 |