I am looking for a noislessnoiseless protection against 100ms pulse of 1kV of an input of ultralow noise instrumentation preamplifier (8xeight AD8428 connected in paralellparallel, fixed gain of x20002000) to measure very low voltages around 100uV up to 30 kHz of bandwidth.
Input protection is a very challanging part of the design, it. It is mandatory to keep the input resistances low as possible to limit thermal noise, while still protecting it from high voltage. Some days ago I getgot an idea from here, to use mosfetsMOSFETs and keep them fully open at normal conditions and close them when HV apears, I attaching the circuit.
Circuit:
I am confused about how to drive the gate of these mosfets, whileMOSFETs. While isolated power supplies shouldcould be used, there is a concern about the switching frequency of these power supplies introducing harmonics that could couple to the input and add noise? I.
I have considered converters like:
On the PCB, there are two channels of the preamp circuit requiring 4xfour isolated switching DC-DC power supplies altogether. Each channel with an input and output 2nd order low-pass filter around 30 kHz. I plan to place the MOSFET protection before this filter on the chassis plane right next to the LEMO input connector. The
The output will be read by a high-end FPGA, enabling advanced digital filtering to eliminate known noise frequencies.
Should I be concerned about potential noise from the four switching DC-DC converters? Is this frequnecy seperation would be enough as alone? The switching frequency will be more than 10x above my low-pass filter. Again, I would like to measure very low voltages in range of 100uV up to 30kHz, the gain is also very high which means the sensitivity will be also very high.
With that FPGA a second order IIR notch filter could be used to filter out specified frequency band (LabView). Are my assumptations right and with synchronizing switching frequency of the converters, I can reduce and shrink the freq. range needed to filter out? Only in case if I really need to take care of that noise coming from converters.
Should I be concerned about potential noise from the four switching DC-DC converters? Would this frequency seperation be enough alone? The switching frequency will be more than ten times my low-pass filter. Again, I would like to measure very low voltages in range of 100uV up to 30kHz, the gain is also very high which means the sensitivity will be also very high.
I a bit worry about using DCPA10512 integrated circuits, as they seem to have a design similar to the DCP02 Series, which has been on the market for 24 years.Also looking for alternative solutions, avoiding using switching power supllies. The MOSFET would only need to turn off a few times per day during an experiment, requiring only 1-2 mA for a few milliseconds during switching off, with almost zero consumption otherwise. Is there any simple solution for providing here isolated "charge" for the gate?
With that FPGA, a second order IIR notch filter could be used to filter out specified frequency band (LabView.) Are my assumptations right and with synchronizing switching frequency of the converters, I can reduce and shrink the freq. range needed to filter out? Only in case if I really need to take care of that noise coming from converters.
I a bit worry about using DCPA10512 integrated circuits as they seem to have a design similar to the DCP02 series, which has been on the market for 24 years.
- Also looking for alternative solutions, avoiding using switching power supllies. The MOSFET would only need to turn off a few times per day during an experiment, requiring only 1-2 mA for a few milliseconds during switching off, with almost zero consumption otherwise. Is there any simple solution for providing here isolated "charge" for the gate?