Timeline for ATMEGA328P ISP SPI connection conflict issue
Current License: CC BY-SA 4.0
3 events
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| Jul 11 at 15:51 | comment | added | Jay Dee | thanks, I will try it on one to see, I can scrape the MISO pad off the board before punting a chip back to see what happens, the boards are useful for somthing even if a pot does not work, they were quite useless without a processor. | |
| Jul 11 at 14:36 | comment | added | Tim Williams | You might take note of the description for SPI in this chip. SPI in general kind of works two ways: either as a straight-through shift register that some bits are tapped on/off of (this case), or as a single packet transaction (or incremental bytes thereof). The former can be chained like any shift register, and all devices updated at once; the latter is likely only point-to-point, or perhaps a terminal device. Since it's a write-only device, it seems unlikely you need MISO connected at all here. | |
| Jul 11 at 13:08 | history | answered | Jay Dee | CC BY-SA 4.0 |