Timeline for Direct Coupling and No bias on JFET guitar preamp's
Current License: CC BY-SA 3.0
5 events
| when toggle format | what | by | license | comment | |
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| Oct 22, 2013 at 18:57 | comment | added | johnfound | @Sdlion - Don't forget that the NP junction opens on 0.5..0.6V forward, positive voltage. So, if the positive semi-cicle of the signal have amplitude less than this value, the gate junction will stay closed and there will be no gate current nor distortions. | |
| Oct 22, 2013 at 18:46 | comment | added | Sdlion | Oh yes, I forgot that on a common drain setup. Well I mean in the case you mention, when is working with a 0V bias | |
| Oct 22, 2013 at 18:34 | comment | added | johnfound | @Sdlion - Not at all. The positive semi-cicle of the AC signal will still be lower that the Vs and Vgs will remain negative - less negative of course, but still negative. | |
| Oct 22, 2013 at 18:30 | comment | added | Sdlion | But a positive semi-cycle of an AC signal (N-JFET) would still be ignored and result in a distorted output? | |
| Oct 21, 2013 at 18:58 | history | answered | johnfound | CC BY-SA 3.0 |