Why is the Digital 0 not 0V in computer systems?

Question

I'm taking a computer system design course and my professor told us that in digital systems, the conventional voltages used to denote a digital 0 and a digital 1 have changed over the years.

Apparently, back in the 80s, 5 V was used as a 'high' and 1 V was used to denote a 'low'. Nowadays, a 'high' is 0.75 V and a 'low' is around 0.23 V. He added that in the near future, we may shift to a system where 0.4 V denotes a high, and 0.05 V, a low.

He argued that these values are getting smaller so that we can reduce our power consumption. If that's the case, why do we take the trouble to set the 'low' to any positive voltage at all? Why don't we just set it to the true 0 V (neutral from the power lines, I guess) voltage?

Answer 1

You are confusing the "ideal" value with the valid input range.

In usual logic, in ideal conditions, the logical zero would be precisely 0V. However, nothing is perfect in real world, and an electronic output has a certain tolerance. The real output voltage depends on the quality of wires, EMI noise, current it needs to supply etc. To accommodate these imperfections, the logic inputs treat a whole range of voltage as 0 (or 1). See the picture in Andy's answer.

What your lecturer probably meant by 0.75V is one of the points making the logical 0 range.

Note there is also an empty range between 0 and 1. If the input voltage falls here, the input circuit cannot guarantee proper operation, so this area is said to be forbidden.

Answer 2

You are getting confused. Look at TTL for example: -

A low input level is between 0 volts and some small value above 0 volts (0.8 volts for the case of TTL).

why do we take the trouble to set the 'low' to any positive voltage at all?

We take the trouble to ensure it is below a certain small value.

Picture from here.

Answer 3

It is impossible to produce true zero volts logic signalling. There must be some tolerance allowed for, as the circuitry is not infinitely perfect. Spending money trying to make it infinitely perfect would not be a good investment of design funds either. Digital circuitry has proliferated and advanced so fast because its uses huge numbers of copies of the very simple and tolerant circuits that are logic gates.

The binary states 1 and 0 are represented in digital logic circuits by logic high and logic low voltages respectively. The voltages representing logic high and logic low fall into pre-defined and pre-agreed ranges for the logic family in use.

The ability to work with voltages within these ranges is one of the primary advantages of digital logic circuitry - it's not a failing. Logic gate inputs can easily distinguish between logic high and logic low voltages. Logic gate outputs will produce valid logic high and low voltages. Small signal noise is removed as logic signals pass through gates. Each output is restoring the input signal to a good logic voltage.

With analogue circuits, it is between more difficult and practically impossible to distinguish noise from the signal of interest and to reject the noise entirely.

Answer 4

Additionally to the points that is made by the other answers, there is the issue of parasitic capacities at high switching speeds (the usually ignored capacitance of wires and other components). Wires usually also have a slight resistance. (A very simplified model!)

^{simulate this circuit – Schematic created using CircuitLab}

Being an RC network, this results in an exponential falloff curve ( V ~ e^-kt ). If the receiver sets it threshold very low (near 0V) then it would have to wait a significant time for the output voltage drop enough to trigger the threshold. This time might seem insignificant, but for a device supposed to switch a million (billion even) times a second, this is a problem. A solution is to increase the "OFF" voltage, to avoid the long tail of the exponential function.

Answer 5

Because nothing is perfect and you need to provide for this with a margin of error. Those numbers are thresholds. If the lowest possible voltage in your system is 0V and your threshold is 0V, where does that leave you if ALL your components and wiring aren't perfect conductors (i.e. always have some voltage drop) and noiseless in a noiseless environment? It leaves you with a system that can never output 0V reliably, if it can even do it at all.

Answer 6

In a 2 rail system (usually chips powered with just a single positive voltage plus ground), whatever switch or device is pulling the output capacitance down to a low signal level has finite resistance, and thus can’t switch a signal wire to zero Volts in finite time. (Ignoring superconductors). So some realistic lesser voltage swing is chosen which meets performance requirements (switching speed vs. power requirements and noise generation, etc.)

This is in addition to margins needed to cover ground noise (different ground or “zero” voltage levels between the source and destination circuits), other noise sources, tolerances, and etc.

Answer 7

Contrary to some responses here I'm pretty sure that there has been such a thing as a pure 0V low in the past. Relay logic! I don't think we want to go back to that though!

Answer 8

The simplest answer is that all semiconductors used for digital logic outputs have some voltage drop across the two output electrodes, that there are practically always some stray currents, voltages and noise present on a line, in a circuit or at an input, and that waiting for an output or input to fall to absolute 0.00V makes a logic circuit slower. Those issues have been steadily reduced as components and circuits got improved over the years, which has allowed decreasing the logic voltage levels and ranges while increasing speeds and decreasing power requirements, but they can't be completely eliminated, and thus some headroom needs to be allowed to counter them. In an ideal world, a logic zero would be 0 volts, but an ideal and a practical/real world are not the same thing.

For BIPOLAR transistors like the NPN type used in the common emitter configuration, the voltage across the collector-emitter practically never reaches zero, and can be anywhere from 0.1V to 0.7V, possibly going higher in high speed and high current circuits. With MOSFET transistors, the output voltage comes much closer to 0.0V but it still depends on:

1. the MOSFET channel ON resistance (R_DS(ON)), which in very small MOSFETS used in high-density ICs is higher than in high power discrete MOSFETS (which, in turn, are also slower)
2. the current through the drain-source channel
3. the speed of switching the MOSFET on and off

Since the higher speed circuits involve quickly changing the states of the individual elements of a digital circuit and charging and discharging parasitic capacitances, the very fast discharge of such a capacitance generates a high-current pulse which generates a higher voltage drop across a conducting element or a switch.

There is also some noise or voltage drops in the circuits or on the signal lines, which is never at an absolute zero volts, so allowing some level above 0.00V to be interpreted as 0 is necessary to make sure the digital logic circuit doesn't remain stuck at a logic 1 because the input never saw an absolute zero (of 0.00V).

Finally, an important thing that either you don't remember or your teacher didn't mention as a reason why we're going for even lower voltage levels range is that it also allows FASTER switching between the states (between 0 and 1), besides the lower power consumption. Going from 0.2V to 2V will take longer than going from 0.2V to 1V, while also using more energy. Even IF we can achieve 0.00V at a logic zero level AND properly interpret it, it will take a little longer than waiting for some level above 0.00V (like the 0.05V your teacher mentioned) which includes a "settling time" (the time required for the output to reach and steady within a given tolerance band), which will defeat the goal of increasing the logic circuit speeds.

As my practical advice, I recommend you try using a high resolution digital voltmeter (more than 4 digits) and you will see the further you go from the decimal point to the right, the more unsteady those digits become, and you can even measure a small voltage in a short-circuit, due to galvanic junction, stray induced currents or voltages and the inherent noise in the input of the voltmeter or any instrument for that matter. Also, the neutral or zero in power lines is almost never 0.00V, due to circuit currents travelling through it, stray voltages and currents induced in it, or any other factors. Try sticking a piece of metal into the ground and measuring the AC voltage between the ground and the neutral wire, and you will see that it is not really at a zero compared to ground. That will help you understand why an absolute zero is a very rare occurrence in practice.

Answer 9

There are some decent answers here, but there's a flaw in your understanding, and it's unclear who's wrong - you or your professor.

"I'm taking a computer system design course and my professor told us that in digital systems, the conventional voltages used to denote a digital 0 and a digital 1 have changed over the years."

This is definitely true.

"Apparently, back in the 80s, 5 V was used as a 'high' and 1 V was used to denote a 'low'."

This is incorrect. 0.8V was the upper limit of low, and 0V was used to denote low.

"Nowadays, a 'high' is 0.75 V and a 'low' is around 0.23 V. He added that in the near future, we may shift to a system where 0.4 V denotes a high, and 0.05 V, a low."

Again, this is incorrect. Zero is still logic low. Although there are a range of values that can also be interpreted by the hardware as logic low, zero is still logic low.

"He argued that these values are getting smaller so that we can reduce our power consumption."

This is partially correct. It is the DIFFERENCE between these values that is getting smaller so that we can reduce our power consumption.

The choice of high and low voltage are, technically, arbitrary. They are standardized for obvious reasons. Throughout the history of electronic circuits, there have been many, many, many other high and low voltage levels used than the ones you stated, and many with a logic high far higher than +5V and logic lows far lower than 0V!

Why don't we just set it to the true 0 V

We do. We absolutely do set it to true, absolute, exactly 0V by specification, very often in fact. However, we also build in a range of values because very often, we find it difficult to reach absolute 0V for the reasons stated by the other posters.

You can't make the difference between the low and high voltages zero for obvious reasons (how would you tell the difference between the two?)

The fact of the matter is that the voltage is only part of the equation when it comes to power consumption. The power used by the logic circuitry is much more important, and voltage is merely one part. You could have a theoretical +5V High, 0V Low circuit that draws far less power than a +1V High, 0V low circuit.

It turns out that there are fundamental, universal limits to the minimum amount of power any logic circuit can draw, regardless of how you design it. Look up reversible computing theory.

Answer 10

From a Process Control Instrumentation angle, this BIAS above Zero, is to provide additional info about the integrity of the instrument. If an instrument was calibrated 1V-5V = 0-400 gallons per minute (gpm), then, if 1V was measured by the instrument, you'd know that there was 0 gpm. All would be normal.

However, if 0V were measured, then that would be some kind of alarm condition that the instrument has failed or shorted. A properly programmed control system would throw its respective control loop into manual to prevent slamming the valve either closed or open.

In other words, this BIAS from Zero allows the control system an additional, indirect method to know the health of the measuring instrument (i.e., circuit hasn't Grounded or Failed). If you didn't do this then you might not know if 0V were normal or an alarm condition.

Of course, in the old days, we didn't have all the smart instrumentation that communicates much more diagnostic info. :-)

Update: @Transistor has provided some additional insight, which is much appreciated. For what it's worth, I did realize that there was a digital vs analog conflict in my response (mainly due to the highly technical comments/answers). What I was trying to do was make an 'analogy argument', similar to water pressure vs voltage, to impart a possible reason to not 'just use 0V' as a basis. However, I still may have missed the point. @Transistor, I don't have enough Reputation to Comment, so my question back to you: Should I delete my response? I certainly don't want to mislead. Thanks.