125 MHz parallel bus in a double 2.54mm header

Question

I have a BeMicro CV low cost dev board from Altera. It features a Cyclone V.

FYI: Schematics and gerber here

They routed impedance controlled differential lines to some dual 2.54mm standard headers.

See the at the top of the picture below:

It seems that they cared about the controlled impedance, and also the line lengths.

I would like to connect a 1000Mbit PHY with GMII interface (parallel 125MHz clock).

Can I plug a daughter board to this one and convey the 125MHz signals using a simple 2.45mm header?

Answer 1

I think it should work. These connectors seem to have relatively low capacitance.

If you are really worry about this - you may try to pass 125MHz or even faster signal from lab generator and see what is going on oscilloscope.

These connectors were used for ATA hard disks, and they were working with pretty long ribbon wire with bus speed up to 33MHz, so without that ribbon cable there should be no problem with 125MHz (or 125MHz differential signal).

Source:

Upgrading and Repairing PCs Scott Mueller

http://books.google.com/books?id=E1p2FDL7P5QC

Answer 2

Although the lines look like matched pairs, they are not (by the look of it) matched between themsleves, so the delays on each of your databits is likely to be different. This will eat into the margin that your interface has (unless you are making a custom daughterboard, in which case you can compensate for the differences in delay on by making your traces shorter where they connect to long traces on the main board.

Having said that, the differences are likely to be very small, and at 125MHz single-data rate (which is what GMII is), I imagine you'd be OK.

More of an issue might be if there are enough ground connections to enable the signals to make it across cleanly. If there are very few ground connections, you will get "ground-bounce", which in the worst case makes your clock look like it has two edges where there should be one!