Increasing current capability of a Pin

Question

This is a followup from my previous question.

Here's a summary of how the circuit works:

I'm designing a circuit that can test for short circuits and open circuits in a wiring harness. The wiring harness does not have a CAN bus or anything complicated like that - just simple wires.

I have two CPLDs, one as a designated driving end (all pins are output) and another as an receiving end (all pins are input). The driving end CPLD is programmed to be a Serial In Parallel Out shift register and the receiving end is a Parallel In Serial Out shift register.

I was given an excellent answer by Majenko that I should use pull up/down resistors and tri-state the my inactive output pins to avoid bus contention.

The problem is that, after some discussion with my colleagues, I realize that a single wire may end up driving upto 70 or so wires in the harness. Let me explain more clearly - assume we have a junction in the harness that has about 20 wires going to various places. We also have another junction with a similar no. of wires.

If the junctions get shorted with each other, a single pin from my CPLD will end up driving 40 wires. If each wire, on the receiving end, is connected with a 10k pull down it means that the pin testing the wire must be able to output 3.3/10k * 40 = 13.2mA.

Here's a schematic that illustrates this more clearly:

Please note I drew this only for the purposes of this question. This is NOT a schematic but merely a picture to illustrate what I'm saying. In this circuit, each junction has 5 wires. If one of them gets shorted together, the single pin with 3.3V will need to drive all 10 of these wires. In an extreme case, its possible that larger junctions get shorted and the pin needs to drive upto 100 wires!

Since the CPLD's current rating is just 25mA (Absolute), I guess need some sort of buffer between the harness and the CPLDs. Any suggestions regarding this?

The obvious solution is to just increase the pull down resistor. But I was told that because the length of wires be quite large (around 10 meters), its best to have a stronger pull down.

EDIT: I was playing around in Falstad Circuit Sim. I find it helps me clear things up conceptually. I ended up making this circuit, after someone's suggestion, for my problem:

This would solve the current issue as the current isn't source/sinked from the pin. But is this a good solution to the above described problem? Perhaps I'm overlooking something obvious. One inconvenience would be that each IO trace would need this MOSFET. Since the goal is to have a tester for harnesses containing upto 300 wires, I'm going to need 300 MOSFETs on the board(!)

Answer 1

I would go for the buffer. You would never have to worry about not delivering enough current or any damage to your CPLD.

Now you can use 300 transistors if your really want to but I would suggest using Darlington transistor arrays. They come in many different flavours, most giving you 7 inputs and outputs at a few hundred mA per channel.

See here: http://uk.rs-online.com/web/c/semiconductors/discretes/darlington-transistor/?searchTerm=darlington+transistor+array&sort-by=default&sort-order=default&applied-dimensions=4294868855&lastAttributeSelectedBlock=Configuration

You would still need about 40 something arrays but if you are able to use surface mount components it should not become too unwieldy.

Using Darlington transistors:

The Darlington array is usually packaged as follows:

Logic:

Internally:

Now, it may look complicated but it is actually quite simple. Pins labelled "B" are inputs (transistor base) and pins labelled "C" are outputs (transistor collector). All that is needed is for you to use the exact same circuit as you posted above, but instead of a MOSFET, usuing the Darlington pair. Connect the base to the 5V output terminal of your MCU and the collector to the collector resistor (in your case 5k as you indicated). For this package the emitter is common and is connected to ground, also as you have shown.

If you are interested: The Darlington array effectively multiplies the gain of the two transistors it contains resulting in a very high gain. This high gain allows very small currents to flow in through the base while still driving or sinking much higher currents.