The decoupling capacitor should be connected between the Vdd and GND pins. These are at one end of the chip, making this easy. Put the cap right there, which allows short traces between the cap and the Vdd and GND pins.
Make sure the GND side of the cap is connected directly to the GND pin, not separately to the ground plane. Then you can connect that net to the ground plane in one place only. This keeps the high frequency currents the bypass cap is shunting off the ground plane.
Use a ceramic cap, about 1 µF.
Added about placement
I don't know what you mean by "on top of". With the chip oriented the way it is shown on page 3 of the datasheet (pin 1 end up), put the cap above it oriented left/right. Use a comfortable size, like 0805, since that's still smaller than the width of the chip. I'd space the cap maybe a mm or a few 10s of mils from the chip package so the pick and place machine has room. The left end of the cap connects to GND (pin 1) and the right end to Vdd (pin 16). These traces are on the top of the board, no vias, and should go straight between the parts.
Then connect the trace between the GND pin and the left end of the cap to your ground in only one place. For best results that would be a board-wide ground plane, but this net will needs to be connected to your ground net somehow.