SCR "current gain" - calculating gate resistance

Question

Trying to understand the SCR. Have made this outlay which I shall find the right resistors for.

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The SCR is a TYN1225

But since I have found it difficult to understand \$I_{GT}\$ and \$V_{GT}\$ I have begun with this outlay. That is, after I had understood \$V_{GT}\$ I began with this setup and realize now that there was a relationship between the load consumption and \$I_{GT}\$

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Discovered that at the voltages/current I attempted with that there was a gain on around 480, which I only became more confused about.

If I have to make the first layout to be ha max 10A out, then \$I_{GT}\$ should be about 21mA. From this calculation

$$ {10\text{A}\over480\text{ "hFE"}} = 0.02083\text{mA}$$

Do not assume that this "gain" is the same at the different currents (not examined) and do not seem to see anything in the datasheet which gives me an explanation of the relationship between the load and \$I_{GT}\$

Is there such a relationship I can relate to?

Why do I think of limiting the \$I_{GT}\$ opposed to choosing the resistance to max \$I_{GT}\$ As a extra security if it can be done. For example, if I do not want the output to exceeded, lets say 2A, if I then restricts the \$I_{GT}\$, will this not cause the gate not to open if the current exceeds 2A?

The second I'm confused about is the calculation of the resistance.

If I relate to \$I_{GT}\$ = 20mA and \$V_{GT}\$ = 2V

$$ {240\text{AC}\over2\text{periods}} = 120\text{V}$$

$$ 120\text{AC} \times 1.41\text{ } = 169.2\text{peak}$$

$$ 169.2\text{V} - 2\text{V} = 167.2\text{V}$$

$$ {167.2\text{V}\over2*20\text{mA}} = 4.18\text{KΩ}$$

but

$$ 167.2\text{V} \times 2*20\text{mA} = 6.688\text{W}$$

seems to be to much.

What am I doing wrong?

Answer 1

As everyone told you the SCR is not a current amplifier as a bipolar transistor. It is a latch-up component; put enough current on the gate and it will switch on, and it will remain ON until the load current is more than Ih (holding current)

Graph from wikipedia: https://en.wikipedia.org/wiki/Thyristor

Answer 2

Just to be clear about SCR operation ...

^{simulate this circuit – Schematic created using CircuitLab}

Figure 1. The SCR transistor equivalent.

• When the gate voltage, at G, rises enough to forward bias the B-E junction of Q2 its collector-emitter resistance will decrease.
• This will result in a small current being drawn from the base of Q1. As Q1 turns on its collector current will feed into the base of Q2 assisting the gate current.
• This additional base current into Q2 is a form of positive feedback. Q1 and 2 will turn hard-on with each driving the other's base.
• The trigger signal at G can now be removed and the device will remain in conduction. It should be clear that the only way to switch it off is to drop the current to zero somehow. In a mains-supplied circuit this occurs on every negative half-cycle.

To conclude, it is not normal to consider this a current amplifying device. No matter what the \$ h_{FE} \$ of the transistors is the device will turn hard-on when an adequate trigger is supplied. The SCR current is then only limited by the source and the thermal characteristics of the device. You can't partially turn it on with, for example, half the recommended trigger current.

You can turn it on part way through the mains cycle to give phase control of the voltage and this has the effect of varying the AC but in fact it is fully on or fully off with the ratio of the times determining the average current.

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\$ I_{GT} \$

JustMe: I began with this setup and realize now that there was a relationship between the load consumption and \$I_{GT}\$.

This is incorrect. \$I_{GT}\$ does not control the load in any proportional way.

There is an excellent 240 page and very readable document by ON Semiconductors, Thyristor Theory and Design Considerations Handbook and on page 5 they define \$I_{GT}\$ as

The maximum value of gate current required to switch the device from the off−state to the on−state under specified conditions. The designer should consider the maximum gate trigger current as the minimum trigger current value that must be applied to the device in order to assure its proper triggering.

On page 10 under Basic Behaviour you will read (emphasis mine):

Observe that if current is injected into any leg of the model, the gain of the transistors (if sufficiently high) causes this current to be amplified in another leg. In order for regeneration to occur, it is necessary for the sum of the common base current gains (α) of the two transistors to exceed unity. Therefore, because the junction leakage currents are relatively small and current gain is designed to be low at the leakage current level, the PNPN device remains off unless external current is applied. When sufficient trigger current is applied (to the gate, for example, in the case of an SCR) to raise the loop gain to unity, regeneration occurs and the on−state principal current is limited primarily by external circuit impedance. If the initiating trigger current is removed, the thyristor remains in the on state, providing the current level is high enough to meet the unity gain criteria. This critical current is called latching current.