I have tried searching for the difference between these two terms but everything I find gives ambiguous results. What is the difference between a harware register and a processor register, if there is any?
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1\$\begingroup\$ "register" you mean? \$\endgroup\$– ratchet freakCommented Sep 16, 2017 at 1:47
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2\$\begingroup\$ Not all hardware is a processor. \$\endgroup\$– Ignacio Vazquez-AbramsCommented Sep 16, 2017 at 1:49
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2\$\begingroup\$ Need some context here. Talking about MCU, FPGA, ASIC or good old wire wrap? Bruce's answer is correct for MCUs, but in FPGA, the term could encompass pipeline registers (which aren't addressible), shift registers etc, as well as peripheral registers. \$\endgroup\$– user16324Commented Sep 16, 2017 at 8:44
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1 Answer
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A processor register is a storage element inside the processor which is used to hold numeric values, addresses, status or control bits which are involved in internal processor operations.
A hardware register is a storage element inside peripheral hardware (eg. an I/O port or DMA controller) which is separate from the processor. These are used to configure and control the peripheral hardware or hold data and status information relating to the peripheral.
As with most definitions, there are grey areas. Some architectures have processor registers in external memory or I/O space. Others have internal CPU registers which control peripherals or are connected I/O pins.
answered Sep 16, 2017 at 5:57
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\$\begingroup\$ Internal CPU registers don't control peripherals or I/O pins, peripheral block registers do that. Internal CPU registers are limited to things like the register file and the registers that control the CPU itself. In modern MCU's there's a lot that is on-chip, but not part of the CPU. \$\endgroup\$ Commented Sep 16, 2017 at 15:04
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1\$\begingroup\$ CDP1802 CPU register summary: Q, 1 bit, output flip/flop. "An internal flip-flop, Q, can be set or reset by instruction and can be sensed by conditional branch instructions. The output of Q is also available as a microprocessor output. \$\endgroup\$ Commented Sep 16, 2017 at 16:09