During experiments with a TRIAC I noticed that appart from the triggering signal the A1-Gate voltage remains 0V under no load condition. Under load conditions the A1-Gate voltage remains elevated after triggering up to the moment the TRIAC stops conducting.
In the information found so far I find only information on the latching current nothing on the above mentioned effect.
Why is this happend or do I make an error in the measuring procedure?
Yes, the gate of a thyristor acts as a voltage source when the thyristor is conducting. The voltage is generally a bit higher than the gate trigger voltage and will be of the same polarity as MT2 for a triac.
That means that the gate voltage can swing from (say) +1.3V for triggering to (say) -1.4V when it turns on in quadrant IV (and the reverse in quadrant II. Or it can barely change in quadrants I and III.
In some cases, impedances connected to the gate of a thyristor can have noticeable effects on the commutation or holding characteristics. Thyristors designed to be reliably commutated directly from the gate were called GTO (Gate Turn Off) devices.
I don't know but my book gives this equivalent circuit if A2 > A1 and for A1 > A2.
So, this equivalent circuit confirms your measurement.
