You should consider the reduction in capacitance that ceramic capacitors exhibit under bias. This is particularly true of the type of capacitor or capacitors that you will need to get to 100uF/16V.
For example, take this 22uF/16V X7R capacitor:
As you can see, at 12V, the capacitance has dropped to about 9uF, so you would need 11 of them to get 100uF with 12VDC bias, rather than the 5 you might have thought.
Electrolytic capacitors have stable value regardless of bias voltage.
The other possible consideration is that if you have something like a voltage regulator connected to the capacitor, the ESR may be too low when using the ceramic capacitors. Normally that might be considered an advantage, but some regulators are not stable (i.e. may oscillate at high frequency under some load, line or temperature conditions) if the ESR is too low. You can simply put a small resistor in series to mimic the electrolytic cap if that is the case.
As indicated in a comment by @OskarSkog another possible issue with too-low ESR is that the resulting high-Q LC circuit formed by stray inductance and the low-ESR capacitor can lead to damaging transient voltages across the capacitor under some conditions, as described in LTC's AN-88.