Placement of Vias to Connect Ground Planes

Question

I've been wondering a lot about grounding practices on PCB layouts. My first question about it deals with vias. I've noticed that on a simple 2 layer PCB with ground planes on both sides, there will typically be a few or several vias spaced out to connect them with minimal impedance between the two copper pours.

However, on an RF board the via placement looks much more deliberate and I'm wondering about the theory behind this. The vias connecting the ground planes often border the RF trace. See this differential coplanar waveguide example:

I also have a second question about grounding on PCBs. When is it appropriate to "isolate" ground planes from each other? And how does having the ground planes on one layer (let's say top) isolated from each other help when both of those ground planes are connected to the same ground plane on the bottom through vias. When we have these isolated ground planes, does the via placement differ from either of the above cases?

Note: I'm aware of the possible duplicate here but I'm not satisfied with the answers and think my question asks for more detail.

Thank you for the information.

Answer 1

The layout you showed looks like what's called copper-backed coplanar waveguide (CBCPW). That means the ground return for the waveguide is not just in the coplanar grounds (the ground fills on the same layer as the signal traces) but also in the plane layer immediately "below" the signal layer. This structure is fairly esoteric, in the sense that I've only seen it used in digital systems when data rates exceed 20 Gb/s.

I found what looks like a reasonable discussion on the differences between CBCPW and microstrip in a Microwave Journal article by Rogers Corp engineers.

This article shows that the CBCPW has lower loss than microstrip at frequencies where radiation loss becomes important in the microstrip, roughly from 25 GHz and up, which explains why CBCPW is not widely used at lower frequencies.

Addressing your question, the article points out some special requirements for grounding vias in CBCPW structures:

For proper grounding, CBCPW circuits employ vias to connect the top-layer coplanar ground planes and the bottom-layer ground plane. The placement of these vias can be critical for achieving the desired impedance and loss characteristics, as well as for suppressing parasitic wave modes.

This basically means that without frequent stitching vias between the coplanar ground and the backing ground, power could be transferred to undesired propagation modes, which would cause either excess insertion loss or strong dispersion in the transmission line characteristics.

Answer 2

Part 1: A long slot in a top-side ground plane can act as an antenna, both in terms of radiating and picking up currents that are attempting to flow perpendicular to the slot. You can think of a slot as a "negative wire" of sorts. More detail can be found here.

High-frequency currents that are trying to get from one piece of the top-side ground plane to another (flowing perpendicular to the RF trace) are forced to flow around the borders of the gaps between the pieces. Now consider what happens if the length of the slot equals half the wavelength of the current. The voltage across the slot is forced to zero at the ends of the slot (where the pieces are connected), but this means that the voltage difference across the slot will be highest at the center of the slot. Similarly, the current (across the slot) is forced to zero at the center of the slot, but is maximum at the ends of the slot. This is the electrical "dual" of an ordinary half-wave wire antenna, in which the current is maximum at the center and the voltage is maximum at the ends. The slot and the wire are equally effective as antennas, coupling RF energy to and from the space around themselves.

The multiple vias connecting both sides of the slot to the solid ground plane on the other side "short out" this slot antenna, eliminating that problem.

Part 2: Independent ground planes for certain "noisy" subsystems (or, for that matter, subsystems that need to be particularly "quiet") on a board, which are connected to the system-level ground plane at just one point, serve to confine the return currents for signals inside that subsystem to just that area of the board, preventing them from affecting (or being affected by) other subsystems on the board.

For example, suppose you have a microprocessor-based data acquisition system that has a high-resolution ADC and some analog signal-conditioning circuitry upstream of that. You might create one ground plane for the analog circuitry and another one for the microprocessor and its crystal and other digital peripherals (e.g., a large flash memory chip), and connect each of these to a system ground plane (or to each other) at just one point. This keeps the high-frequency noise of the crystal and the other fast-switching digital I/O signals of the microprocessor out of the ground plane for the sensitive analog circuits. You'll see this if you look at the layouts of evaluation boards that manufacturers produce for their high-resolution ADC and DAC chips.

Answer 3

In CPW or Coplanar Wavequide the RF energy is between the conductors on top of the substrate. This is common in semiconductors where it is difficult to access a ground plane and the distances are very short. For PCBs there needs to be a bottom ground and this is referred to as grounded coplanar waveguide (CPWG) or conductor backed coplanar waveguide (CBCPWG). The via spacing is to create a virtual wall the the RF energy cannot leak through. The higher the frequency, the shorter the wavelength, and the closer together the vias have to be. Here is a link to a paper that shows this through testing different boards on pages 14 - 21.

http://mpd.southwestmicrowave.com/showImage.php?image=439&name=Optimizing%20Test%20Boards%20for%2050%20GHz%20End%20Launch%20Connectors