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Ok so the back story is this. I landed an online code interview with a company that shall remain nameless.

I know I am not ready for a job there but I was basically given the chance by an insider. Anyways below is a picture of the question.

I have experience doing register programming and dealing with micro-controllers, but all of this is on my own so I have never seen "real industry up-to-standard code" so to speak. I most definitely have never dealt with any "memory dump" from a micro-controller , because well I have never had such bug or even knew it could do that...

My question is two fold.. first is the questions in the picture... if anyone can answer them.... and my other question is...if a micro-controller fails or something goes wrong and it stops working then how does it do a memory dump? seems to me that it would require it to be in working order to execute something like that. otherwise youll just get the memory dump of what things looked like "before" the crash. enter image description here

enter image description here

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The memory dump in question was not taken at crash. It was taken for debuging. A memory dump 'at crash' is created for a software error (exeption) detected at runtime by the program or debugger.

The question is simple. The 'dump' contains a memory occupied by an instance of the struct packet_S. You need only interpret the bytes into data types of member variables. And the struct is very simple. It takes 1 + 2*2 + 4 bytes.

The content of the struct starts at 0x1010 so count is 0x6F. This is not affected by 'endianes'. The ints and the long are affected by byte ordering, so you need to interpret them for A and B.

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  • \$\begingroup\$ so that means data[0] and [1] would be 0xD5 and 0x70 ? \$\endgroup\$ Commented Dec 1, 2018 at 6:14
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    \$\begingroup\$ no, int is two bytes \$\endgroup\$
    – Juraj
    Commented Dec 1, 2018 at 6:15
  • \$\begingroup\$ oh no because data is uint16 so data[0] would be 0xD570 ? correct? \$\endgroup\$ Commented Dec 1, 2018 at 6:16
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    \$\begingroup\$ it depends if end byte is first or last (endian) \$\endgroup\$
    – Juraj
    Commented Dec 1, 2018 at 6:16
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    \$\begingroup\$ This is not quite correct. Without structure packing, the compiler will align everything to 4 byte boundaries. The structure uses 4 * 4 bytes. \$\endgroup\$
    – Jon
    Commented Dec 1, 2018 at 10:01
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This is a bit of a trick question. Without structure packing each element will be aligned to a 4 byte boundary. This means there are quite a few padding bytes in the structure. Even though these are not zero, their value is irrelevant. Also note that the compiler cannot reorder the elements in the struct. This information means the structure's memory layout is well defined.

Little endian means the lowest address is the least significant byte. So we can calculate the structure values as follows:

count = 0x6f
data[0] = 0x9994
data[1] = 0xb2ca
timestamp = 0x2ec5b98e
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  • \$\begingroup\$ In some version of compiler, the structure "uint16_t data[2]" is packed into two 16 bit data. because some controller has an ALU feature that they can work with int16 in the pipeline. \$\endgroup\$
    – M KS
    Commented Dec 1, 2018 at 10:47
  • \$\begingroup\$ now you solved it for him and he for sure don't get the job, if the potential employer finds this \$\endgroup\$
    – Juraj
    Commented Dec 1, 2018 at 11:00
  • \$\begingroup\$ @Juraj oh no the interview is over, they record your keystroke and once you close the window it’s over no second chances lol \$\endgroup\$ Commented Dec 1, 2018 at 21:01
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if a micro-controller fails or something goes wrong and it stops working then how does it do a memory dump?

It generally doesn't. Doing a broad memory dump of all of RAM is risky, because under many microcontroller architectures, doing a read from certain SFR addresses has unintended effects, so you can't naively iterate through indirect addressing over all of the RAM address space.

If this is something you really, really need, one option is to rig up a 1980s-style microcontroller with an external memory bus and a watchdog. If the watchdog times out, have a secondary post-mortem microcontroller that saves the RAM contents to an EEPROM chip (or whatever).

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