USB Softcore for FPGA : Extra resistor on FPGA transmitter pin

Question

Have anyone used this USB softcore before ?

Why do we need extra resistance on the tx pin ONLY ?

Whichever pins you transmit on need to have resistors after them. The exact values will depend on the internal resistance of the pins; usually something around 27 ohms will be ok.

According to section 7.1.1 (Tx) and 7.1.2 (Rx) of the USB 2.0 specification , it seems like we need some resistance for impedance matching for BOTH Tx and Rx.

1) is it correct that I only need TWO 27 ohm resistors in series (to compensate the low output impedance, say 73 ohm of FPGA pins) with the FPGA usbcorev softcore D+ and D- pins ?

2) And another 1.5 kilo-ohm pull-up resistor for D+ line ?

3) Since D+ and D- are bi-directional, do we need 15 kilo-ohm pull-down resistors for both D+ and D- line at FPGA pins ?

4) From on-chip termination section within intel cyclone IV IO inteface spec (have anyone used on chip termination ?) , I am not sure if I need to use external series termination resistors for both D+ and D- line. When I loop deeper into cyclone IV IO spec, it only supports 25 ohm or 50 ohm on-chip termination. This means this on-chip termination is not suffice for 90 ohm transmission line in USB spec . Could anyone advise ?

Answer 1

First of all USB doesn't have a "TX pin" and an "RX pin" — both D+ and D- are used bidirectionally.

The reason for the series resistors (one on each pin) is that the output impedance of the FPGA pin drivers is significantly lower than the nominal impedance of the USB cable. A series resistor addresses this mismatch, eliminating signal reflections at that end of the connection.

This particular softcore uses two pairs of unidirectional pins to connect to the USB D+ and D- signals, rather than a single bidirectional pair. The termination resistors go between the Tx pair and the Rx pair, as follows:

^{simulate this circuit – Schematic created using CircuitLab}

It isn't clear from the README.md file what additional logic is required for the rx_se0, tx_se0 and tx_en pins.

Answer 2

Dave Tweed has answered your original question. I am trying to address your additional ones:

1) is it correct that I only need TWO 27 ohm resistors in series (to compensate the low output impedance, say 73 ohm of FPGA pins) with the FPGA usbcorev softcore D+ and D- pins ?

You need in-series resistors only on Tx lines and only if you fail to configure the driver I/O to a better impedance match. Configuring I/O cells for 4 or 6 mA drive strength will give you a sufficiently good match, so no resistors might be necessary.

2) And another 1.5 kilo-ohm pull-up resistor for D+ line ?

Not exactly. The 1.5k pull-up on D+ line must be controlled from a different GPIO, and only when yet another GPIO senses the presence of VBUS coming in. Some USB PHY implementations disconnect the pull-up when transmitting, and connect it back to provide valid USB idle state of the bus.

3) Since D+ and D- are bi-directional, do we need 15 kilo-ohm pull-down resistors for both D+ and D- line at FPGA pins ?

No. 15k pull-downs must be (and will be) provided from host side of the link.

4) From on-chip termination section within INTEL cyclone IV IO interface spec (have anyone used on chip termination ?) , I am not sure if I need to use external series termination resistors for both D+ and D- line.

You can use the variable termination control using the mode with external calibration resistors, so you can set the impedance to nearly any value you need, this is both in Altera and Xilinx modern devices. But this is a hardware option, and your board must implement it and waste two pins form a bank. If you have some inexpensive development FPGA kit, it is very likely that footprints for this calibration resistors are not implemented. But the individual configuration for LVCMOS3.3V at 6 mA always remain as an option.

All-in-all, the FS mode of operation is not that sensitive to minor mismatches in transmission line impedance, so all this topic is just a nitpicking.

And no, you don't need 90-Ohm termination on receiver end for FS signaling interface, the receiver in FS mode is high-impedance receiver (open end).