Differential Pairs and GND

Question

I have some doubts about different configurations of differential pair I have seen in many cases:

In these schemes, biasing network for the gate is not shown for simplicity. All of them are excited by an input differential signal, but

• In 1) two different opposite signal sources are applied to the transistors. The output is taken between the drain of one MOSFET and GND. It is clear for me.

• In 2) the pair receives a differential signal in a different way, by using only 1 voltage source. I have the following doubt: how can that signal be amplified by the MOSFETS, if they are not referred to GND? How can that circuit work?

• 3) is like 1), but the output signal is taken from both drains and not from 1 drain and GND. This allows to double the gain. But, despite that difference, is there a reason to prefer 3) on 1) or viceversa? I'd say that 3) is better because noise on GND is not transmitted to the output signal. Is it true?

• 4) is like 2), but the output signal is taken from both drains. I have the same doubts said about 3) and 1).

Other doubts:

• I have seen that the current source is often replaced by a simple resistor. In this case, it is important for it to be very high in order not to have common mode gain. But, in general, which is the reason for choosing a current source between Source and GND, or an high resistor between Source and GND?

• Sometimes this kind of circuit works with VDD and -VDD, so with dual voltage supply. Which is the reason for choosing it or a single supply?

Answer 1

Maybe this picture will help understanding Fig. 2 and Fig. 4...

... and this - the need of a bipolar supply:

Answer 2

In 1) the output is Voltage across resistor "R", so it is referenced to Vdd. Your schematic shows it referenced to ground, which is incorrect. If Vdd is constant, both will be the same AC output with a different DC offset. However if Vdd is variable or noisy, referencing the output to Vdd will reject most of the noise, whereas referencing the output to GND will reject none of it.

Schematics 2) and 4) cannot work in practice because, as you noticed, source Vm sets the differential input voltage, but nothing sets the common mode input voltage. So you can split the Vm source in two identical sources Vm/2 like in schematic 3, and connect the middle point between these sources to the common mode voltage. In schematics 1 and 3 the common mode voltage is GND but you can use any voltage as long as it within the range allowed by your FETs. Note in schematics 1 and 3, both sources have value Vm, so differential input voltage is 2x higher in schematics 1 and 3 than in the others.

3) is like 1), but the output signal is taken from both drains and not from 1 drain and GND. This allows to double the gain.

yes, 2x the gain.

But, despite that difference, is there a reason to prefer 3) on 1) or viceversa? I'd say that 3) is better because noise on GND is not transmitted to the output signal. Is it true?

As said above in schematic 1 the output should be referenced to Vdd, not GND.

Schematic 3 provides a differential output, which is useful if you need a differential signal (also see below). Another option is to replace the resistors with a current mirror, which results in a push-pull current output.

I have seen that the current source is often replaced by a simple resistor. In this case, it is important for it to be very high in order not to have common mode gain.

Schematic 1 would have common mode gain, but schematic 3 would not, because the output is differential. Variation in Ibias causes common mode output voltage variation, but not differential output voltage variation. However varying Ibias does change the differential gain.

But, in general, which is the reason for choosing a current source between Source and GND, or an high resistor between Source and GND?

If you're considering an opamp input stage and the input common mode voltage spans almost the whole range between the supplies, if you want a reasonably constant current, there is no way to do it with a resistor. Also a current source will result in better common mode rejection and power supply noise rejection.

Sometimes this kind of circuit works with VDD and -VDD, so with dual voltage supply. Which is the reason for choosing it or a single supply?

One supply is cheaper than 2 supplies if you can get away with it.

Answer 3

It's difficult to find and more expensive to get matched transistors for current sources if you're making a discrete circuit and a lot more space too. But none of these are issues on silicon. I think on silicon it actually saves space since you can use on reference transistor for many mirrors of different values by varying transistor geometry and because transistors are smaller and cheaper than resistors on silicon (I think).

If you're operating off a battery, single supply is a lot more convenient but it comes at a penalty in performance such as how close your output can get to GND, noise, bias currents, etc.