0
\$\begingroup\$

I'm looking at the datasheet for the op-amp LM7171. How do I make sense of the measurements of the total harmonic distortion shown in the below picture? How much THT is too much. In my circuit, I had a sine wave input of 10 Mhz and my output was very distorted. I guess I 'm asking if that has anything to do with THT. Thank you

datasheet image

enter image description here

\$\endgroup\$
2
  • 1
    \$\begingroup\$ Welcome. It would help us a lot if we had a photo of the circuit. Many things factor into distortion, including the load placed on the op-amp, the values of Rf and Cf, non-linear parts, etc. \$\endgroup\$
    – user105652
    Jul 20, 2020 at 0:15
  • \$\begingroup\$ Your layout , probe ground length, lack of decoupling and load path length , crosstalk all affect your poor readings and Note (6). SHow ALL design details \$\endgroup\$
    – Tony Stewart EE75
    Jul 20, 2020 at 0:54

1 Answer 1

Reset to default
3
\$\begingroup\$

Looks like 90,000,000 Hertz Oscillation, on top of your 10,000,000 Hertz input.

Figure 39 shows ringing near this (90MHz) frequency.

With this much gain_bandwidth, its easy to have oscillation.

Notice Fig 62 about capacitive loading.

==============================

  • Use a Ground Plane.

It you are not using a Ground plane, on a PCB, then stop and use a Ground Plane.

=========================================

  • Use excellent VDD bypassing, to the Ground plane, And dampen any VDD ringing by including a series 10 Ohm resistor from your global VDD to the LM7171 VDD pin. Locate the 0.01uF capacitor within 1mm of the IC. Have the PCB Via to GROUND Plane located UNDER the Capacitor GND solder pad.

  • Mimimize capacitive loading on VOUT, including the scope probe .. Read the TI LM7171 datasheet --- page 20/21 suggests using an ACTIVE_PROBE, for very low (2PF) capacitance, and very short lead from the probe to Ground (1" or less).

  • Minimize the PHASESHIFT between Vout and Vin-. How?

  • (A) Use the recommended R_feedback of 510 ohms.

  • (B) Minimize the capacitance on the summing Vin- node. You achieve this by placing the SUrface Mount Resistors directly at the Vin- node, using small solder pads. If your Rfeedback and Rin(to Ground) are further than 2mm from the IC, then expect problems.

  • (C) remove the Ground Plane under that VIN- node. Use a Dremmel grinding tool.

  • To experiment, make a gimmick twisted pair capacitor, and solder across the Rfeedback. Alter the twisting, and examine the waveform.

  • What else? Do not allow magnetic or capacitive coupling from Vout to Vin- pin or to Vin+ pin, or the input PCB trace. Experiment with this, by bringing a screwdriver metal tip near the Vout (do not touch it) and see how the scope waveform changes. There should be NO CHANGES.

\$\endgroup\$
1
  • \$\begingroup\$ Thank you very much for your detailed answer, considering I didn't give you much to go on. I will be sure to check for the things you mentioned. I will also provide more info next time I post. \$\endgroup\$
    – Analog
    Jul 20, 2020 at 16:55

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.