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Let's assume our Microcontroller is running on 3.3V and we have multiple I2c devices running on 3.3V and some on 5V. Can I use a single Voltage translator such as PCA9306 to run all 5V i2c devices, or do I need a voltage translator per each device which is not 3.3V? (All share same GND)

Image just for demonstration

schematic

simulate this circuit – Schematic created using CircuitLab

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    \$\begingroup\$ I've moved comments to chat as they added only a small amount to the subject proper and were more acrimonious overall than is idea. Some comments were "less than fully correct" - but odds of "information transfer" is improved if such are handled in a manner which attempts to not rile the other party. [Innocuous comments may seem less so when you are the recipient]. || "Play nice" :-) || This conversation has been moved to chat. \$\endgroup\$
    – Russell McMahon
    Commented Aug 4, 2020 at 6:29
  • \$\begingroup\$ As shown the arrangement is (probably) workable subject to loading and timing constraints. The issues in the discussion came where 5V supply devices were connected to a "3V3 I2C bus". This would be bad practice if it worked, and probably wouldn't. \$\endgroup\$
    – Russell McMahon
    Commented Aug 4, 2020 at 6:36

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Sure, a single level translator will work just fine for whole 5V bus.

As the MCU uses 3.3V supply, all the I2C devices with 3.3V supply should be directly connected to the MCU I2C bus, and this bus must have the I2C bus pull-up resistors to the same 3.3V supply.

Then the level translator can be between 3.3V and 5V bus segments, and the level translator can be a special chip or just FET pass gate built from discrete components. All the 5V powered chips can be on the 5V bus side which must have the I2C bus pull-up resistors connected to the same 5V supply that powers the 5V chips.

The total bus pull-up resistance should be large enough that current does not exceed 3mA in total, or whatever the weakest chip supports. For example the 5V side can have 4k7 pull-ups and 3.3V can have 3k3 pull-ups and the sum of currents needed to pull low by any chip is only near 2mA.

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    \$\begingroup\$ Figure 43 of NXP's UM10204 spec shows this configuration. \$\endgroup\$
    – Annie
    Commented Aug 3, 2020 at 17:09
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    \$\begingroup\$ @Annie, That solves the issue \$\endgroup\$
    – Shahreza
    Commented Aug 3, 2020 at 18:20
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    \$\begingroup\$ @just can you expand the answer? \$\endgroup\$
    – Voltage Spike
    Commented Aug 3, 2020 at 23:36

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