I've been reading on computer RAM and CPUs. I came to the conclusion that most RAM today use arrays of DRAM while CPU registers and caches use SRAM. 1 bit DRAM is a circuit with one capacitor and 1 transistor which controls the flow of charge in and out of the capacitor.
When the transfer from RAM occurs the CPU places the address required on the address bus and the RAM controller "opens" the transistors of the bits specified by the address.
If containing a charge, the capacitor will then discharge onto the data bus to the capacitor of the 1 bit register.
My question is about the requirements of the register state when the transfer occurs. If the bit of the register is set, then even if the RAM capacitor contains a charge, it will not discharge onto the data bus. The operation is thus not necessary.
Another situation is one where the register is set while the RAM bit is not set. If the path is open between the 2 capacitors then the charge will be transfered from the register to RAM which is not the required behavior.
I think of it as with the following circuit:
Is it the right way to think about memory transfers in computers?
Is the register grounded to 0 before the transfer occurs?