Most transistors, and especially power transistors, exhibit long base-storage times that limit maximum frequency of operation in switching applications, unless clamped, such as in this circuit with Vce clamped by Vbe ( or with a Schottky diode B-C clamp or a Baker's dual diode clamp etc). In storage time tests Vbe is switched from Vbe .0.6 at some Vce(sat)/Ibe(sat)-10 to Vbe = -500 mV ( industry standard) whereas in this question Vbc is = 0 by design**
does it have recovery time when turning off?
Yes. But it will be less than the Recovery time is in the datasheet since the B-C diode capacitance reduces somewhat from 0.7V to 0V and pF reduces greatly for Vbc = - Vcc approx. with inverse voltage yet -500 mV (standard test) for Vbe to Vce storage test times.
Not that the D44 and D45 differ in \$C_{cb},f_T,t_D+t_R,t_F \text{ yet } t_S~\$ is not affected with both = 500 ns.
This is tested with Vbe= -0.5V after Ic/Ib=10 using Ib= 0.5A from the bottom of page 2 in the ON spec.
From nominal values in fig's 5, [6] and 7, [8] for D44, [D45] this means "Storage Time = 500ns" is measured at Ic=5A, Ib=500mA 25'C ;
Vce[sat]= 150, [275] mV
Vbe(sat) = 940, [960] mV
Yet when Vce=Vbe HFE is not 10 nor is current gain as high as hFE @ Vce=1000 mV (std test condition Vce=1V) but something in between so Ib is much lower and thus will have faster response time than Is @ 5A because Ib will be more like 2 to 3% of Ic rather than 10%. (Ic/Ib=10) yet the storage energy in the cloud capacitance layer E= 1/2CV^2 so the bulk capacitance in B-E will have the same voltage as Vce @ 5A but more Miller effect from Ccb @ hFE >>10.
If anyone has more to add or subtract. pls edit.
Edit (vangelo): I think it does deserve a direct comparison (signal x power BJT) to illustrate and I think it should not be posted as a separate answer: