I'd like to understand why capacitor is used in this circuit instead of connecting PWM pin directly to N-MOS.
- How does Q3 have HIGH reference with no direct connection?
- What kind of advantage I have using a C between PWM and gate?
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1\$\begingroup\$ instead of connecting PWM pin directly to N-mos. Where, how? I see no direct PWM input connected to the NMOS. \$\endgroup\$– BimpelrekkieCommented Apr 22, 2021 at 14:01
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2 Answers
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I can see an application for this.
If you put a 12V clock on buzz so this is attenuated to 4.5V.
Then DAC can be a sine or triangle + voltage that modulates the buzz smoothly so it sounds like this on a speaker.
Let it capture a few bursts then press play. You may change the clock to any f and modulation triangle as you see fit.
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Note that C21/R20 provide a high-pass filter for the BUZZ signal, and a low-pass filter for the DAC signal. The signal at the gate of Q3 will be some kind of combination of these signals - the AC component of BUZZ and the DC component of DAC.
This lets you adjust the bias point of Q3 (the gate voltage when there is no BUZZ signal) using the DAC. I assume this is done to provide a volume control. By biasing Q3 higher (but still so much that it shuts off during the low part of the BUZZ signal), it conducts more current when it's on, and thus makes a louder sound.
I also thought it could be an adjustable bias voltage to maximize linearity, but considering that the signal is called BUZZ, linearity is probably not a concern.
