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I'm having trouble understanding the structure of FPGA datasheets. From what I can tell, there is usually a table of "Signals Descriptions" with the pin names and their function, but I don't see any indication of the pin number. See example below, from Lattice "iCE40" datasheet.

How are the actual pin numbers determined? Is this defined elsewhere? Is it decided only by the VHDL/Verilog code (and if so, can any number be any signal)?

enter image description here

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    \$\begingroup\$ It is package dependent and FPGAs often come in multiple packages, so yeah other spec sheets somewhere. You then need to define the pins in the configuration software to match the package. \$\endgroup\$
    – DKNguyen
    Commented Nov 15, 2021 at 16:47

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The iCE40 represents a FAMILY of FPGA devices and not a specific part. So to determine the pinout you need to choose a specific model from the list of available parts offered and then consult the pinout document for that variant.

The Lattice web site has all of these available. You might start at:

Lattice iCE40 pinouts

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  • \$\begingroup\$ I'll add that Lattice provides these in Excel format, which makes creating the logic symbol much easier. Same with Xilinx. \$\endgroup\$
    – hacktastical
    Commented Nov 15, 2021 at 20:33

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