What are the caveats in this circuit design?

Question

My question relates to the circuit in the image below. I have a non-inverting amplifier that generally will need to operate as a buffer (voltage follower) after a low pass filter to give a low impedance output that I can use elsewhere. In certain situations, the input to this op amp (U4) is low enough that it would be beneficial to amplify this signal (around x10 based on resistors chosen below). To accomplish this, I had the idea to put an N-channel MOSFET in the feedback loop that I can switch on and off with a digital control (from uC, button press, etc.). When switched on, the Rds is low (140 mOhms for the specific FET I'm looking at using) resulting in a gain of essentially 1. When switched off, the Rds is very high, making the feedback resistance nearly equal to R13 and changing the gain to approximately 10x.

Is this an acceptable way to accomplish this? Is there a better way to do it? Potentiometers or switches are out of the question as I need a way to control with a microcontroller output in some instances.

Then there's a follow up question to the circuit. What if instead of merely turning FET on and off, I sent a PWM signal into the gate? With a low pass filter after the output of the op amp, changing the duty cycle would give me a variable gain between 1 and 10. As simulated in LTspice, this seems to work, with a few caveats:

1. Cutoff frequency of the low pass filter after the output looks like it needs to be about 100 times lower than the PWM frequency in order to get a low-ripple output. PWM frequency is limited by my microcontroller speed. In my particular case, this isn't a problem at all. If I can pass through even 50 Hz, that's plenty.
2. The input signal can't be larger than 1/10 (less a bit) of the positive rail of the op amp to get consistent results.

I thought it was a kinda cool idea, and it simulates well enough in LTspice, but didn't know if there was maybe a better way to accomplish this, or maybe there's something I'm missing that would come back to get me later when I actually tried to implement it. I appreciate any and all feedback that you have.

Answer 1

The best option to start is a decent transmission gate/analog switch IC. Barring that, the FET as proposed is theoretically workable but raises some concerns (some here, some in comments)

Switching the FET in and out seems plausible, as long as your control signal can reach to at least the negative rail and past the positive rail. As long as the gate voltage is well above the highest voltage expected on the op amp output, you have a nice comfortable triode operation where the FET is shorted.

However, if your output voltage reaches high enough to turn the FET off when it's meant to be on, your gain goes up as the FET resistance increases, so the gain increases and you lose control of your circuit. Even if it doesn't turn completely off, you've added a new behavior into the feedback loop which might lead to instability or poor performance, so it's best to keep the MOSFET firmly in triode with the gate well above the highest voltage you could see.

You'll also need to keep the body diode of the FET in mind, since you have a discrete FET with source and body bonded together. Because your output stays >= 0 V, this shouldn't be a major issue, but if you start working with signals that go negative you'll need to revise the design.

I'd budget at least one Vgson drop above the positive rail, which you could probably do with a 5 V square wave and a charge pump circuit consisting of a few diodes and ceramic capacitors. A second FET would then either pull the gate of M1 down or not, while a pullup resistor connects it to the charge pump.

An alternative approach would be a transmission gate, if you're able to create two complementary control signals that swing all the way to the positive and negative rails. An integrated transmission gate IC will also avoid the diode issue outlined above.

As for the PWM idea, I am skeptical of its accuracy but can't conclude that it's a poor idea for certain. Op amps have a limited and not-always-symmetric slew rate, which could compromise the accuracy of your result, especially as your PWM gets faster. If you do want to explore this further in simulation (rather than experimenting with a prototype) make sure your op amp model adequately models slew rate and other large-signal behaviors.

Finally, if a commercial off-the-shelf variable gain amplifier (either cascaded with your op amp, or replacing it altogether) can meet your specs, that's probably going to be a simpler idea to implement and qualify.

Answer 2

You will get more predictable and repeatable performance if you move the FET. Connect it between the left side of R14 and GND. Now the Vgs that the FET sees is no longer variable depending on the amplitude of the output signal; the gate is driven by the external whatever, and the source always is grounded. Note: this ground must be the same as the external whatever.

When the FET is off, the shunt feedback leg is open and the circuit reduces to a voltage follower. When the FET is on, R14 is effectively grounded, turning the circuit into something with voltage gain.