Can you place a large series resistor on the input of an LDO?

Question

I would like to use an RC filter to filter out noise, since the down stream components only needs a maximum of 30mA.

Is it possible to use such a large resistor on the RC filter to achieve very low cut off frequency?

A 100 ohm - 10 uf combination will give me about 159 Hz cut-off which is pretty good. The LDO will be current limited to 50mA (5v/100ohms) which I don't mind since the circuit downstream is only 30mA.

Will the output of the LDO still be 3.3V? If not, how do calculate what the output voltage will be so I can adjust the resistor in order for me to have a 3.3V output?

Answer 1

Of course there can be a RC filter before the LDO.

But the reaistor value is wrong.

The LDO needs more than 3.3V at input to provide 3.3V output. The LDO says the dropout voltage is 250mV and otherwise the LDO parameters are measured at VIN = VOUT + 1V. The 250mV assumes that output has already dropped by some percentage when drawing a certain amount of current.

If you want to play safe, there must be 3.3V+1V = 4.3V at the LDO input while 30mA flows, so you can calculate the resistance required.

Answer 2

This LDO's datasheet specifies PSRR with a dropout voltage of 0.9V, which is pretty much normal.

At low dropout voltage, the PMOS pass transistor in the LDO gets its Vds squeezed. As with all other FETs, at low Vds its capacitance increases (ie, its bandwidth is reduced), and it loses transconductance. This means it requires more drive from the error amp, and it also gets harder to drive: to change its output current by a small amount \$ \delta i \$, both the required Vgs swing and the associated gate drive current increase. The pass MOSFET is part of the feedback loop, so this translates into a loss of open loop gain and bandwidth. PSRR, which depends on feedback, will thus decrease at low dropout voltage, sometimes quite dramatically.

At high enough dropout voltage, the FET behaves as a controlled current source: changes in Vds result in small changes in Id, so the intrinsic properties of the FET help with PSRR, which the feedback loop then improves. At low dropout, it behaves more like a controlled resistor, so it does pretty much nothing for PSRR which then only depends on feedback.

If your goal is to increase PSRR, using a very low dropout voltage would defeat the purpose.

I would leave 1V dropout on the LDO to get the pretty good PSRR specified in the datasheet, so at 30mA this corresponds to 0.7V dropped on the resistor, which means a resistor value of 22 ohms.

If you really want to increase PSRR at high frequency, then a ferrite bead in series with the resistor would be an option. At this low current, you can use a 300-600R ferrite, it probably won't saturate. Adding a few ohms (maybe 10 ohms) in series avoids LC resonance with the caps.

If you want to increase PSRR at low frequency, you'll have to use a larger capacitor, which will then be an electrolytic. You can use 470µF 6V3 FR from Panasonic for low ESR for example. However, you could also just put two LDOs in series, for example the 4.5V one then the 3V3 one.

Note high PSRR and low noise regulators are only meaningful for constant current loads. If the load draws variable current, then the output voltage variations can be dominated by that instead of PSRR.