Three-state buffer SPI termination requirements

Question

I have question regarding SPI termination when using three-state buffers:

1. Do we need termination resistor from master to three-state buffers (since ICs are very close)
2. If we do, then do calculate the trace impedance from three-state buffer to master or slave to master.
3. How MISO where you put termination resistor (close to slave or buffer)
4. Do we even need termination resistor since max trace space is around 20 cm.

Let assume we have below setup which we have two 3.3 V slave. Note: OE is enabled for all channels. (74LVC126)

^{simulate this circuit – Schematic created using CircuitLab}

Please let me know if drawing is not clear or you need more information.

Base on Jens answer

^{simulate this circuit}

Answer 1

You obviously don't use the third high impedance state of the drivers, they are just used as level shifters.

During reset or firmware update the MCU may have undefined voltages at the SPI pins. Therefore I recommend to add pullup resistors at least to the CS-x signals. If they both are accidentially low, the two slaves will drive the same MISO line. This must be avoided.

When the high impedance feature of the driver is used, you need these CS pullup resistors on the slave side as well. I prefer a 100 kohm resistor at the MISO line to avoid floating voltages if no slave is selected.

20 cm trace length is significant, if you feed these lines with series resistors of 33-100 ohm you will have less EMI problems and lower ringing. At the receiver end you can design in an optional pullup resistor just in case.

For very high frequency SPI channels like SD cards, things are different. In my experience a proper termination (e.g. 330 ohm) is necessary at this distance.