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I have been reading on the unpacked and packed arrays in SV. I have mostly understood the concepts and style with which arrays are declared. However, there are some particular cases:

  1. reg [8:0] stack [2][4]

here is my similar code :

 module tb;
  
  reg [8:0] stack [2][4] ;
  initial begin
    
    int i,j ;

    foreach (stack[i])
    
    foreach (stack[i][j]) begin
  
      stack[i][j] = $random;
      
      $display("stack[%0d][%0d] = 0x%0h" , i, j, stack[i][j]);
      
    end
    
    
    
    $display("stack = %p" , stack) ;
    
    $display("stack[0][0][2] = 0x%0h" , stack[0][0][2]);
  
  end

  endmodule 

Since there is only one dimension in the packed side before variable name, how do you explain the structure of this memory. How is it being arranged in terms of width x height x depth, or rows x columns?

Also, what does the stack[1][0][8] return in both of the above cases? Stack is taking random values here, I only want to know what bunch of bits will stack[1][0][8] output.

Currently, I don't have access to an IDE, but when I do, I will run these codes myself for better understanding.

here is my vcs output :

Compiler version S-2021.09; Runtime version S-2021.09;  Oct 21 10:16 2022

stack[0][0] = 0x124

stack[0][1] = 0x81

stack[0][2] = 0x9

stack[0][3] = 0x63

stack[1][0] = 0x10d

stack[1][1] = 0x18d

stack[1][2] = 0x65

stack[1][3] = 0x12

stack = '{'{'h124, 'h81, 'h9, 'h63}, '{'h10d, 'h18d, 'h65, 'h12}} 

stack[0][0][2] = 0x1

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  • \$\begingroup\$ why is stack[0][0][2] == 0x1 \$\endgroup\$
    – Sac
    Commented Oct 21, 2022 at 14:24

1 Answer 1

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The arrangement in memory of the unpacked dimensions of an array is undefined in SystemVerilog. The only time it matters is when iterating the array using a foreach statement so you know the ordering it iterates over the indexes, or when using the streaming operator to know the order it lays out the bits in the stream.

The arrangement of packed dimensions has significance in that the left index represents the most significant bit(MSB) and the right index represents the least significant bit (LSB) of an integral vector. Note that you are not allowed to pack arrays of int/byte directly.

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  • \$\begingroup\$ so, byte stack[2][4] is invalid? I ran it on vcs, doesn't give any warnings. \$\endgroup\$
    – Sac
    Commented Oct 21, 2022 at 15:53
  • \$\begingroup\$ byte stack[2][4]; is an unpacked array and is allowed. byte [8:0] stack[2][4]; is not allowed. That was code in earlier versions of your question. \$\endgroup\$
    – dave_59
    Commented Oct 21, 2022 at 16:03

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