Connecting pads with the same functionality belonging to one chip

Question

I have a question about routing style of pads with the same functionality belonging to one chip. I draw a picture in Paint (fictional IC; let it be the SOIC8 footprint). GND is only as example (it can be any net, but the same functionality for both pads).

Question is: if we have pads like (A) connected by a straight line, is it ok or I should prefer more elegant (B) solution? Also, is starting the path from the long side of pad as in (D) acceptable alternatively, or is (C) more legit? Do these different styles have any impact on PCB performance?

Answer 1

(C) vs. (D): I don't think there are any significant advantages to one or the other.

(A) vs. (B): I would default to (B). The reason is that (A) can look like an unintentional short after soldering. Especially with finer pitch devices there might be not enough solder mask between the pads to prevent the solder from flowing over the little trace to the other pin to form one big chunk of solder. Or the PCB manufacturer may have removed the solder mask between the pads altogether due to their solder mask capabilities.

It might look something like this:

You can't see it on the picture, but the five most left pins have that exact (A) connection with short traces between the pads. It's not a real problem, of course. But it might cause unnecessary concern to someone or something (AOI) inspecting the board. One might even argue that those solder joints could be weakened, because there is a lot of solder in places where it's not supposed to be (on and/or between the pins instead of forming nice fillets at the heel and the toe of the pin).

Sometimes you don't have the space for (B), of course. And wider pitch packages like SOIC shouldn't be as prone to this phenomenon.

But like I said: I would default to (B).

Answer 2

All these schemes should be fine, I've never had issues with any of them. This is considering normal operating temperatures. The nice thing about B is you can cut the trace easier if you need to do rework.

It's really when you get into 5 or 3 mil traces into BGA pads that you really need to consider breakage

Answer 3

On a 4+ layer PCB, there is a huge ground plane running underneath all that anyways and you connect each GND pad to that.

And even on 2-layer boards, if you have a ground pour those traces aren't even there because the copper in those GND pads are just part of the same ground pour with some solder mask etched away to form the pad so you can solder to it.

For signals, I use A because B can really get in the way of other traces.

C and D are used as the situation calls for based on how you need to squeeze in surrounding trace and to make the most shortest, most direct trace.

Answer 4

From my experience, I prefer routing as C; I avoid routing type D (for visually appearance).
When the Pads have the same signal, I route as B.
You could also route as A, it works fine as B.

Here you can find an extract of SOIC-8 pin datasheet from Texas Instruments.

Image source: Texas Instruments - UCC25600 datasheet