The problem is on a circuit which implements PFC circuitry.
There are two parallel 0.36R current sense resistors located in the inrush current path. These resistors measure the PFC current through the ground return path. They are exposed to the inrush currents and these inrush current amplitudes tend to change according to the impedance of the AC grid and the initial angle under which the AC grid has started to operate. It has been observed that these current sense resistors become open-circuit after they are exposed to the inrush current.
The resistors are 1206 package SMD resistors and I have attached their locations on the PCB below. It has been observed that the inrush current is larger under the condition that the circuit is energized directly from the AC grid. The breakdown happened just as we plugged in the device to the line.
In my opinion, the IC has been damaged because the inrush current could've passed through the respective pin on the IC. The impedance of the line is varying region by region in our country. The resistor should be selected in such a way that it should handle the worst case scenario, which is the minimum line impedance.
We have also realized that pad to pad clearance of these resistors may be closer than the isolation requirements. I'm just wondering if the applied voltage breaks down the isolation between the pads. Could it be possible that this outcome may have occured after this effect?
Below in the simulation screenshots (notice that 0.18R represents 2x0.36R parallel resistors), it can be seen that the insantaneous power losses caused by the inrush current go up to the 1 kW level. I would be very glad if you could tell me what could be the root cause for this problem. The inrush current is the best explanation I can bring to this problem but I would like to hear your contributions on this matter as well. Also I would be very glad if you could help me with resistor selection under such parameters. Because I cannot find the single pulse curves in some datasheets.