Push button latch circuit - switch issue

Question

I have built a single push on/off latching circuit as per the diagram. It runs from 12 V.

It works, but the issues I have is that first, it is already on when I connect power, it should start off, second, I have to flick the switch extremely fast for it to turn off, like the switch has to close for only a fraction of a second, any longer and the LED I have attached just flickers but stays on.

How can I make sure it is off when power is connected? And how can I make the button press longer, like 0.5 s to 1 s?

^{simulate this circuit – Schematic created using CircuitLab}

Answer 1

This is a simple starting point:

^{simulate this circuit – Schematic created using CircuitLab}

After some long time with the momentary switch open and assuming that whatever is at \$N_1\$ is weakly holding \$Q_1\$ off, then \$C_1\$ will charge up to \$V_{_\text{CC}}\$. Closing the momentary switch now will immediately dump charge into \$Q_1\$'s base, causing it to turn on and pull down hard on \$R_2\$. Both the active base and the passive \$R_2\$ will now discharge \$C_1\$ -- very rapidly at first and then more slowly, later. If held continuously, \$Q_1\$ will eventually find a quiescent point, with \$Q_1\$ just enough in active mode to overcome the weak hold via \$N_1\$. In short, it will be an analog circuit while the switch is held closed and not really digital. When released again, the momentary no longer connects that loop and \$N_1\$ could re-establish the weakly held off state of \$Q_1\$ and then \$C_1\$ will charge back up to \$V_{_\text{CC}}\$.

It's a start.

Add another BJT to "weakly" hold \$Q_1\$ off to complete this early picture:

^{simulate this circuit}

Will need a way to also weakly hold \$Q_1\$ on, too. This is, after all, going to be a two-state device:

^{simulate this circuit}

Now, perhaps something similar to what's working with \$Q_1\$ already at the base of \$Q_2\$ and tied in such a way that \$Q_1\$'s state controls \$Q_2\$'s state:

^{simulate this circuit}

Does this have two states?

Assume \$Q_1\$ off. Then \$R_1\$ pulls up on both \$R_2\$ and \$R_5\$. Both \$C_1\$ and \$C_2\$ will charge up, but \$C_2\$ will be limited by \$Q_2\$'s base. \$Q_2\$ will definitely be on and \$C_1\$ will charge up to whatever the \$R_1\$+\$R+5\$ divider voltage allows it.

Assume \$Q_1\$ on. Then both \$R_2\$ and \$R_5\$ will pull down on \$C_1\$ and \$C_2\$, both of which will discharge. \$Q_2\$ will turn off in time. But with \$R_3\$ via \$R_4\$ pulling up on the base of \$Q_1\$ it will stay on.

Given the right component values, the above is workable.

It won't handle an external load (much.) Adding that capability:

^{simulate this circuit}

Now it's just a matter of supplying values.

\$C_2\$'s voltage is \$V_{_\text{C}}\approx 700\:\text{mV}\$ when \$Q_1\$ is off and \$Q_2\$ is on. In the opposite case, both \$C_1\$ and \$C_2\$ voltages are \$V_{_\text{A}}=V_{_\text{C}}\approx 100\:\text{mV}\$. What's key here is that the other state of \$C_1\$ should be about halfway to \$V_{_\text{CC}}\$ to make two very distinct states. Ratiometric is good as it helps with tolerating a wider range of supply voltages.

Solving, find that \$R_5\to R_1\$ as \$V_{_\text{CC}}\to\infty\$ and that \$R_5\approx 0.72\cdot R_1\$ when \$V_{_\text{CC}}=5\:\text{V}\$. That's a helpful boundary range to know. There may be other considerations for \$R_5\$, but that's a starting thought.

Another thing to be dealt with carefully is \$V_{_\text{B}}\$ must be arranged so that it turns the PFET off when \$Q_2\$ is off and that the PFET is on when \$Q_2\$ is on. \$R_3\$ will have to be carefully considered as both \$R_4\$ and \$R_6\$ are otherwise similarly involved in both cases.

I'm not interested in the web schematic. It's not well-designed. I'm open to helping with values for the above. But only if there's interest. Otherwise, this is my answer and that's that.

Answer 2

This circuit was found on various electronic web sites

Sometimes that's a problem: the circuit might not have been tested, or might have been a starting point for further exploration. It's not a given it's supposed to work at all.

The LED is connected to the collector of Q8 via a 2n3906 transistor.

Please edit the schematic to add that transistor, by clicking "Edit" on the question, then "Edit this schematic" under the schematic in the preview below the edit window:

This answer will be updated once you present the complete circuit as-built.

The part of the circuit that you had shown is equivalent to a two-inverter "state keeper" - a memory cell, with an additional inverter that charges a capacitor. The button connects the inverted state to the memory cell's input, flipping its state. The capacitor is driven through large resistances R22-R23, intended so that the button can be pressed for some time and the capacitor will be essentially static while that happens. The time constant of the capacitor voltage is approximately 1μ*1MΩ=1s. So, if the button is depressed for a fraction of a second, the capacitor voltage is "constant".

^{simulate this circuit – Schematic created using CircuitLab}

Now, we can derive an equivalent circuit that highlights the functional blocks and hides their implementation somewhat.

^{simulate this circuit}

Alas, the overall approach is problematic. We don't want the circuit to be sensitive to the duration of the button press. The memory cell's input should be driven momentarily only, no matter how long the button is depressed. Every time the button is depressed, there should be a positive or negative pulse sent to the input, to flip it.

We can generate such pulses using a differentiator. So, something like the below:

^{simulate this circuit}

The overall idea is rather simple: C1-R1 forms a low-pass filter that slows down the rise and fall times of the output nQ, so that they don't reach the memory cell input C. Since the differentiator's time constant C2*R2=1ms is much smaller than C1*R1=100ms, the slow changes of the voltage on A are not passed to C.

C1 is discharged via R3, so when the power is lost for more than a second or two, the startup condition will revert to OFF. Short power interruptions will maintain the previous state. This is - presumably - desirable.

When the button is open, both sides of the differentiator capacitor C2 are at the same potential, since it's shorted via R2. C1 is charged to the inverse of the output logic state. When SW1 is depressed, the inverse state on C1 is passed through C2 to the input of the memory cell, flipping its state. After a couple ms, C2 charges up and becomes "open circuit". Further changes of voltage on C1 are slow and cause only small voltage changes on the differentiator output - too small to change the state of the memory cell.

What's left to do is to implement it using transistors. To make the circuit robust, the inverters need to have push-pull or totem-pole outputs with impedance much lower than whatever we connect as a load. Ideally, we'd also want the circuit to consume very little power when idle, to make it useful on battery power.

^{simulate this circuit}

Each rectangle is a TTL inverter, scaled for 12V operation. The resistor values may need to be adjusted to be more in the center of operating range.

Now we can work on making it consume less power. Using CD40106 as inverters would solve that issue pretty much.

Answer 3

Try a 100 uF capacitor to Q9 pnp transistor between emitter leg (+) and (-) ground (or between positive and negative terminals of 12 volt power input). When power is first given, surely circuit is off.

Answer 4

Assuming the led is connected with a series resistor from the positive supply to Q8 collector there is no reason for that circuit to start up "on" outside of strong interferance. eg: 50V spikes on the supply could cause spurious turn-ons, if your supply is clean there must be a fault with one of the parts or with how they are connected.

To make it switch slower increase C16