Help with designing a circuit with logic gates

Question

I want to build a circuit with the following design:

• 3 inputs
• 1 NOT gate
• 2 AND gates
• 1 OR gate

This is my truth table:

 I1 | I2 | I3 || output

 0  | 0  |  0 ||   0       
 0  | 0  |  1 ||   0       
 0  | 1  |  0 ||   1       
 0  | 1  |  1 ||   1       
 1  | 0  |  0 ||   0       
 1  | 0  |  1 ||   1       
 1  | 1  |  0 ||   0       
 1  | 1  |  1 ||   1       

Can someone help me with what components should I buy?

I know there are chips that have AND/OR/NOT gates, but I was wondering if there's a single one that have all of the ones I need - if not, then what should I use specifically?

Answer 1

Same deal as Keelan's answer, but using a single 74xx00 series NAND chip (4 gates):

^{simulate this circuit – Schematic created using CircuitLab}

Answer 2

First step is filling a Karnaugh map. The first one for little bit help filling the map:

$$ \begin{array}{c|c|c|c|c|} \text{I1}\cdot\text{I2}\cdot\text{I3} & \text{I1}\cdot\text{I2} & \overline{\text{I1}}\cdot\text{I2} & \overline{\text{I1}}\cdot\overline{\text{I2}} & \text{I1}\cdot\overline{\text{I2}} \\ \hline \text{I3} & 111 & 011 & 001 & 101 \\ \hline \overline{\text{I3}} & 110 & 010 & 000 & 100 \\ \hline \end{array} $$

Then fill the truth table $$ \begin{array}{c|c|c|c|c|} & \text{I1}\cdot\text{I2} & \overline{\text{I1}}\cdot\text{I2} & \overline{\text{I1}}\cdot\overline{\text{I2}} & \text{I1}\cdot\overline{\text{I2}} \\ \hline \text{I3} & 1 & 1 & 0 & 1 \\ \hline \overline{\text{I3}} & 0 & 1 & 0 & 0 \\ \hline \end{array} $$

And solve: \$ \text{output} = \boxed{\text{I1}\cdot\text{I3}+\overline{\text{I1}}\cdot\text{I2}} \$

From here follow one of the implementations in the other answers.

Answer 3

Your output follows this formula:

output = (I1 & I3) | (!I1 & I2)

A circuit would look like:

^{simulate this circuit – Schematic created using CircuitLab}

For logic gates, you can use the 7400 series:

• AND: 7408, e.g.
• OR: 7432, e.g.
• NOT: 74LS04, e.g.