Errors in measurement of Input offset voltage

Question

I am reading AD application note MT-037 for input offset voltage measurement procedure.

App note says , measurement will have small error induced due to input bias current .

"For example, 2 nA bias current flowing through the 10 Ω resistor produces a 0.02 µV error referred to the input"

My question is, if the source resistances seen (10||10k) are same for both inverting and non inverting terminal then 2 nA bias currents will generate same common mode voltages (0.02 µV) at inverting and non inverting terminal and eventually get cancelled (CMRR=∞, no mention of CMRR value in app note), then how would they create error in offset measurement?

Answer 1

how would they create error in offset measurement?

We talk about two types of input current usually: -

• Input bias current (same for both inputs)
• Input offset current (difference in bias current between the two inputs

So, we can solve the input bias current problem by keeping the resistors associated with each input the same but, we can't solve input offset current problems other than by keeping the net resistance at each input low.