Decoupling Caps Topology from Microchip MPU Datasheet

Question

I am trying to develop a power distribution network for this device. https://ww1.microchip.com/downloads/en/DeviceDoc/MPU-SAMA5D27C-CNVAO-datasheet-60001532a.pdf

I am looking at decoupling capacitor requirements for the various power rails. The figure shows this diagram.

I am focused on VDDCORE and VDDIODDR. On the BGA device, for each power rail, there are various pins for input power voltage and corresponding ground, especially for VDDCORE and VDDIODDR. Clearly it seems each of these pairs of input balls requires its own decoupling capacitors. Eg, from below, there needs to be decoupling between H3/H4, N5/M5, etc. Please correct me if I am wrong.

Clearly, I will need to 100nF cap replicated 6 times in my schematic for VDDCORE for all the power pin input/ground pairs, correct? I was deliberating on the 20uF cap. Seems like more of a bulk cap (secondary charge holder). Does this guy need to replicated 6 times like the 100nF or is it implied that there is one 20uF bulk cap for the 6 power pairs?

Answer 1

I will try to answer to your question you said

Clearly it seems each of these pairs of input balls requires its own decoupling capacitors. Eg, from below, there needs to be decoupling between H3/H4, N5/M5, etc. Please correct me if I am wrong.

You are Right each pair of power input pins needs a small decoupling caps (100nF) and shall be placed as close as possible from the pins

here you can find some layout recommendations from the manufacturer. in the same document you can find example of decoupling capacitors placement, the manufacturer took 0201 caps in order to be able to place them near to the pins

regarding the 20uF based on my knowledge you need only one for all pins, this is considered as bulk capacitor

from the same document you can find these note.

pay attention there are constraints on the maximum ripple accepted by the component on the VDDCORE power supply

hope this could help you