Multiplexing I2S: multuple I2S devices on single bus

Question

I am working on a project which involves capturing audio from a linearly-arranged array of microphones, and processing that data to identify the peak frequency (highest amplitude) detected by each microphone in the array. Each microphone is connected to the next one via a length of cable (currently 500mm between mics).

At present, I'm using an STM32 Nucleo F722ZE microcontroller, which can be configured with 2 x I2S channels, with 2 x mono microphones per channel. The WS selects which of the two mics to read data from, so I am able to read data from a maximum of 4 microphones. The whole system works well at present.

I need to add more microphones (let's say an extra 4, making a total of 8) and also keep the number of bus connections to a minimum. I don't want to use an extra microcontroller. It seems to me that multiplexing the I2S bus is an option, but I have limited experience of multiplexing clocked data in this way.

Can anyone advise a good strategy, or suitable resources?

Thanks!

For reference, the STM32 code works as follows (simplfied):

1. Capture I2S channel data into a buffer (one buffer per channel. Each buffer stores alternate L+R mic data).
2. When buffer is half/whole full, perform FFT on data from each mic.
3. Detect peak frequency amplitude.

Answer 1

I2S doesn't really work that way as most ADCs are SDM and need a continuous clock, but if you can switch the bus into TDM mode you can typically get 8 or 16 channels which would work as long as the hardware on both ends supports it.

I routinely do 8 or 16 channels over a TDM bus using I2S style pinning, clock rates go up so you need to be a little careful about termination and signal integrity, but 48kHz sample rate % 16 channels is fairly routine. Now I am typically using an FPGA to do my processing, so format conversion is easy, if using a micro you will have to have a poke around what the I2S peripheral (Or SPI peripheral, sometimes an alternative) will do and how to configure the DMA to get what you want.

Answer 2

You can use a multiplexer and control it with your MCU. Here is an application note from TI with more details.

Answer 3

In 'F722ZE, you have 3 I2S/SPI modules, plus 2 SAI modules with two subblocks each, that's total of 7 I2S buses i.e. 14 of your mono I2S microphones.

Answer 4

No link to I2S microphone is given so I'll use this MEMS SPH0645LM4H datasheet.

It uses the bit clock to run its internal ADC, which sets the bit clock frequency. Datasheet specifies 3.072MHz typical and 4.096MHz maximum.

To wire two microphones on the same I2S line:

The Tri-state Control (gray) uses the state of the WS and SELECT inputs to determine if the DATA pin is driven or tristated. This allows 2 microphones to operate on a single I2S port. When SELECT = HIGH the DATA pin drives the SDIN bus when WS = HIGH otherwise DATA = tri-state. When SELECT = LOW the DATA pin drives the SDIN bus when WS = LOW otherwise DATA = tri-state.

Now to wire more microphones on the same I2S bus... it won't be I2S because I2S is stereo. It would be TDM.

Multichannel I2S exists, but that's basically one stereo signal per data line, and shared clock/WS lines. If you want one data line, it's TDM.

However you still need to transfer all the bits, so the bit clock frequency has to increase in proportion to the number of channels. So if you need 3.072MHz bitclock for 2 channels, then you'd need 6.144MHz for 4 channels.

Unfortunately the microphone won't support this bitclock frequency, it's above the maximum, so the simple option of hacking the internal tri-state logic to share a TDM line between multiple microphones isn't going to work.

It's not possible to stop or mux the clock to any microphone either, because it uses it to run its internal ADC.

There's also the fact that a multitap bus with tri-state taps in the middle running at several MHz probably is going to have terrible signal integrity, reflections, etc.

In other words you either need a micro with more I2S inputs or multichannel I2S inputs... or you need a component that inputs I2S from all your microphones and outputs something your micro can digest, like I2S at a much higher sample rate with interleaved samples, or TDM, SPI, whatever.