I was designing an active low pass filter for simple sigma-delta modulation signals. I found that the op-amp will output 3V when the input is 0V given that the power supply is 0~3.3V.
I simulate the circuit and find the same result. The circuit and the result are shown below. The blue line is the output of the op-amp.
According to my analysis, it is essentially a unity gain buffer with 10k2 input resistance in this scenario and the output should be 0V.
I noticed that the voltage will follow when V2 is slightly greater than 0V.
Why does that happen?