Help understanding logical inverters with NPN transistors

Question

I built a circuit using an Arduino board that tests a logical inverter using NPN transistors. It works, but I'm trying to understand why it works.

The circuit consists of 2 push buttons:

1. Left most button on bottom board. This is the Inverter test. When Pin7 is High, this button is disabled. When Pin7 is Low, pressing this button will bring Pin2 Low (causing the onboard LED to illuminate)
2. Right most button on bottom board. This button brings Pin3 Low, which will toggle the state of Pin7.

The yellow wire is my input. When Pin7 is high, the green LED is lit and the input to the right most NPN transistor is high. This is where I am struggling to understand what is happening. When the base is brought high (via Pin7 being high), current flows from the blue line, through the transistor, and back to ground, correct? Why doesn't current also flow through the orange wire? I guess, there is a tiny bit of current that flows through (the virtual multimeter shows ~5mV).

I guess my understanding of electricity is that if a wire is connected to power like the orange wire is through the resistor, then it should have a charge, right? Why does the path through the transistor back to ground take priority when the base is high? Why aren't both paths (blue and orange) energized at the same time?

The final question I have is around power consumption. Will having these NPN transistors connected like this continuously draw current through the circuit? Should I be worried about the current draw if this circuit were battery powered?

If you'd like to explore the circuit, here is a link: https://www.tinkercad.com/things/925tzr3eQgD-logical-inverter?sharecode=HnrjlXw_c_-TWucWs_Mr8GE4MERS-WJjVebuuhAwDyk

EDIT

Here is the schematic. I need to get better at learning how to read these as well... I don't know what the bottom circuits are showing, or why they are not connected to main circuit.

Version B

^{simulate this circuit – Schematic created using CircuitLab}

Original somewhat en-visibilised schematic reloaded.
Both are a bit hard to read but together may be useful.

VERSION A

Answer 1

The schematic is very difficult to read.

The T2 collector is tied to GND, so the it will not function as a normal transistor. It is not clear what your intent is for this signal.

In the text you refer to "Pin7", but there is no pin 7 on the schematic.

UPDATE:

Here is a first pass at a re-drawn schematic. I folded the two schematic sections into one. Based on this schematic, two of my previous comments have been deleted.

NOTE: When discussing the functions of individual components in a circuit, TinkerToy locations and wire colors are not good identifiers. Be clear about which schematic you are referring to, and use the reference designators on that schematic. For example, on my schematic the Q2 emitter is connected to the R4-R6 node.

UPDATE 2:

Here is a re-draw of the OP second schematic.

While there have been circuit changes around Q2, the connections around Q2 are very strange. Because the emitter is pulled up to Vcc, the transistor cannot conduct no matter what the base voltage is.

Also, it is not at all clear what the circuit is supposed to do.

Answer 2

In your version B circuit, if no components are changed, the change below MUST be made for Q2 to conduct.

Both switches are either "strange" or worse in operation.

SW1 on means that Q1 when on is a hard short to ground of GPIO2.
That is not an approved way to treat an IO pin - but will often not cause damage.

SW2 when on shorts GPIO3 to ground.
This is even worse treatment of the IO pin.

---

With SW1 and SW2 open and the Q2 change shown above made:

GPIO2 low.

• Q1 and Q2 always off

GPIO2 high.

• GPIO7 high

  • Q1 on and R1 top goes high.
  • Q2 on and R5 top goes high

• GPIO7 low

  • Q1 off and R1 top low.
  • Q2 off and R5 top low.