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I'm trying to charge a large capacitor bank (C1) with a resistor (R1) and when it's mostly charged, activate a p-FET (M1) using an op-amp comparator. I built a PCB but the p-FET isn't turning on.

I simulated the circuit in LTSpice and it works as I expected it to, the only difference in LTSpice is the p-FET I'm using on my PCB: IXTA44P15T Vds=-150V, Rds(on)=0.065, Qg=175nC isn't in LTSpice so I used a comparable one:

RSJ250P10, Vds=-100V, Rds(on)=0.045, Qg=60nC

Here are the voltages I'm getting on my PCB with a DMM: ~92V on the p-FET gate and 0V on the n-FET drain. enter image description here

I can watch the circuit charge up and see the n-FET's drain drop from 12V to 0V when enabled, I'm just not sure why the p-FET won't turn on. The voltages tell me there's no current through R3, and ~280mA through R2 which has to be coming from the p-FET gate. 280mA = 280mC/s so with Qg=175nC, the gate should be discharged in roughly 0.6ms

Also, for some stupid reason I bypassed R2 but as soon as M2 turned on - it blew up.

I feel like I'm missing something extremely simple but I've triple checked my footprints and layout and all seems correct. Here's the output of LTSpice if it helps enter image description here

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  • \$\begingroup\$ Please clarify your specific problem or provide additional details to highlight exactly what you need. As it's currently written, it's hard to tell exactly what you're asking. \$\endgroup\$
    – Community Bot
    Commented May 15 at 7:57

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For starters, if you really are seeing 92V across R3 as you say, then it will be dissipating 25.6W of power and I tend to think you'd notice that. It may have failed already and gone open circuit.

But the real issue is that you're going way, way beyond the absolute maximum ratings for Vgs and breaking down the gate junction.

From the IXTA4451P15T datasheet:

enter image description here

As a working value, Vgs shouldn't exceed about 10V; the test conditions in the datasheet are usually a good guide. You can achieve this using different resistor values for R2 and R3.

In fact, swapping R2 and R3 would be pretty close and give you a Vgs of 8.4V but you're still dissipating over 2.5W in the resistors, which will soon destroy them unless they're high power types. As you're not using PWM you can easily increase the resistances by a factor of 10 or more.

These are the kinds of things that simulation won't pick up...

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  • \$\begingroup\$ Thanks for the response Finbarr! I swapped R3 to 1.8k and R2 to 10k which did the trick! Vgs is now right about -14V You are probably correct that the p-FET gate is toast, so I started over on a fresh PCB. \$\endgroup\$
    – Ben
    Commented May 15 at 21:16
  • \$\begingroup\$ Great, but you're still consuming 0.7W in those resistors, which is not at all necessary. I'd go for 18K and 100K instead. \$\endgroup\$
    – Finbarr
    Commented May 16 at 9:23

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