I'm new to learning about how to use Karnaugh maps to optimise truth tables into efficient logic circuits, and have been following Dave Jones' excellent tutorial.
As an example to work on, I have chosen to try to make a quadrature decoder logic circuit, such as one might use to read the signals from a rotary encoder.
My rotary encoder is a simple non-absolute position type meaning that it has two square wave outputs (lets call them A and B), 90 degrees out of phase.
By definition this means that A and B can never change state simultaneously, as their phase relationship is etched into a glass disk!
However, these states do need to be included in the Karnaugh map in order for it to be a valid one.
So the normal truth table is shown below. A'
and B'
are the previous values of signals A
and B
respectively, sampled at the previous clock cycle X
is the output logic level which indicates a clockwise move (0) or a counter-clockwise movement (1)...
So I have two interesting conditions to deal with. The lines marked "Don't care" are simply cases when the encoder has not moved at all, so the output X
doesn't matter. Then there are the impossible conditions mentioned above.
Note: I will need a second output Y
that will act as a "move detected" pulse.
Question:
What do we do with "don't care" or "impossible" output conditions when constructing our Karnaugh map?
I believe this is what the KM should look like for the above truth table, but I have omitted the cells that I am unsure about...
My naïve brain wants to think that it would be convenient to just arbitrarily write 1
in some of these empty cells to make grouping of the real 1
s easier.
If I do so then I can group the ones like this for a simple solution of only 2 bit groups...
So my final logic expression would be ((not A') and B) or (A' and (not B))
.
But is this a valid way to solve this problem? I like the idea but it feels wrong somehow. Will this break the logic for the outputs that we DO care about?
Y
signal being irrelevant. TheY
signal is what prevents the "imaginary"1
s from causing problems elsewhere. Because there will be noY
pulse when an imaginary1
bit is active. Makes sense I think. \$\endgroup\$