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I would like to build a USB 3.0 PHY with FPGA. I have heard that some FPGAs transcievers should support OOB that is used in USB SuperSpeed differential lines. I am also wondering if such devices exist in ball-less package (I would like my device to use 2 layer PCB).

I am aware of FX3 devices from Cypress and PHY from Texas Instruments but they are both BGA devices.

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    \$\begingroup\$ High speed interfaces and 2-layer boards are not a combination generally seen as workable, so you are unlikely to find parts intended for such purpose. It's possible you might find such a transceiver still present in the lowest-end member of an FPGA family that ends up available in a leaded package, but getting it to work with the lead inductance and your board may be challenging. You might look instead for an outboard USB interface in a QFN? \$\endgroup\$
    – Chris Stratton
    Sep 8, 2013 at 15:29
  • \$\begingroup\$ It is possible when the traces are short. There are QFP USB 3.0 devices for SD/MMC card interfacing. 2 layer design. All commercially available and fully working. Also I do not need full 10Gbps for my design. \$\endgroup\$
    – Matt Kucia
    Sep 8, 2013 at 15:48
  • \$\begingroup\$ But those are smaller dies in packages with fewer I/O's. High performance FPGA's aren't in BGA's just to make life difficult. \$\endgroup\$
    – Chris Stratton
    Sep 8, 2013 at 15:53
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    \$\begingroup\$ Just a quick note regarding your comment about SD/MMC card interface devices, many of the Chinese products on the market marked as USB 3.0 are not actually USB 3.0 compatible and fail to pass the USB 3.0 tests. I have a few of them in my office that I tested when I was working for a IP company in France as USB 3.0 project lead. \$\endgroup\$
    – FarhadA
    Sep 8, 2013 at 18:29
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    \$\begingroup\$ What the others said about 5 gbps (2.5 GHz) signaling on a 2 layer PCB is valid. But I'll add that there is no way you're going to be able to route a BGA package on 2 layers. There just isn't enough room to get all of the signals out from under the chip. \$\endgroup\$
    – user3624
    Sep 9, 2013 at 0:31

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Earlier in 2012, Xilinx had some support for US 3.0 PHY in their devices, but it didn't work out and they dropped that path completely. Recently there are new IPs on the market that uses the GTX transceivers on the high end FPGAs such as the V7 and some V6 and Zynq devices to interface with the electrical requirements of the USB 3.0.

I am not sure if it is safe to design a PCB for 5Gb/s data rate of the USB 3.0 with only 2 layers.

Here you have a link to the IP company that Xilinx works with:

USB 3.0 Device (USB3_DEV)

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  • \$\begingroup\$ It's certainly doable, but you need very thin laminate, and I really don't see much point. It'll cost more, not less, than the standard 4 layer process. \$\endgroup\$
    – Kuba hasn't forgotten Monica
    Jan 22, 2015 at 15:50
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To answer my own question. There are few options:

  • Actel: ProAsic2, IGLOO2
  • Xilinx GTX capable devices: ex. Spartan 6, Kintetix 7, Virtex 7, Zynq
  • Altera: Starix IV, Arria II

Those compatible devices are available in BGA packages only. It makes little sense to put a few Gbps transciever in small FPGA.

From what I see now (September 2013) it is the best to use Cypress FX3 + FPGA.

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    \$\begingroup\$ Even with the transceivers, were you planning to design the IP yourself? FX3 is the best solution because it has a full USB3.0 support including the device driver for Windows and Linux \$\endgroup\$
    – FarhadA
    Sep 9, 2013 at 12:48
  • \$\begingroup\$ The idea was to develop IP myself. I have already worked with bare-metal USB 2.0 stack. Drivers are the least problem. \$\endgroup\$
    – Matt Kucia
    Sep 9, 2013 at 14:25
  • \$\begingroup\$ You mean you have worked with the USB on the SW side, but the IP is a whole different story, you better stick with the FX3 unless you are planning to work on it for the next year or so. \$\endgroup\$
    – FarhadA
    Sep 9, 2013 at 18:11
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These days there's another solution: TUSB1310A from TI. You could interface it even with a rather low-end FPGA, but it is a BGA product, and you will need ideally a 6 layer board to use it. Unless your product will sell in 10's of thousands, you're really valuing your time very low if you think that a 2-layer design will be cheaper. Just to rent the tools to validate the design is thousands of Euros, and if your design has issues, you'll be paying that over and over again until it passes.

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