LTC2485 I2C Data Format

I am trying to understand the I2C data format of a 24 bits ACD (LTC2485).

The data sheet says it returns 4 bytes (32 bits integer), but is unclear as to where the 24 bits I seek are located.

Here is what I do not understand :

The role of the bits 31 and 30

The two most significant bits (30, 31) are used to indicate over range or under range conditions. They are also used to tell in which "quater" of the full range the signal is located.

The documentation says: If the bit 31 is set, then the signal is between 0V and +Vref otherwise, the signal is between -Vref and 0V.

I understand this as: if the signal is between 0V and +Vref, the code is between 2^23 and 2^24 and if the signal is between -Vref and 0V the code is between 0 and 2^23.

A similar reasoning can be used for bit 30, and Vref/2. That's how binary number works. Both bits can be used to tell in which "quater" of the full range the signal is.

Form this, I guess that bit 31 is bit 23 of the signal, bit 30 corresponds to bit 22, and so on. Thus, the three first bytes should be my 24 bit code.

However, the documentation later tells:

The second bit is the most significant bit (MSB) of the result.

Which would indicate that the result is shifted by one bit. But later on:

The function of these two bits is summarized in Table 1. The next 24 bits contain the conversion results in binary two’s complement format. The remaining six bits are Sub LSBs below the 24-bit level.

Which would indicate that the result is shifted by two bits, and that bits 31 and 30 are redundant (see my explanation above).

And last, the example code provided, uses ... 32 bits instead of 24.

signed int32 x;
x ^= 0x80000000;
voltage = (float) x;
voltage = voltage * 5.0 / 2147483648.0;// Multiply by Vref, divide by 2^31


As a result, I feel lost. Given the 4 bytes I get (let's call them bytes 0 to 3 by order of retrieval) how do I get the voltage measured by the ADC ? What is the role of "The remaining six bits are Sub LSBs below the 24-bit level" ?

Thanks for reading me. The documentation of the part is available here. Explanations on the I2C data format are page 15.

LTC2485 is a "24-bit plus sign" converter. So, officially, there are 25 bits in 2's complement representation.

The 2's complement number is bits 30 to 0. The least significant 6 bits are not part of the 25 bits (sort of bonus garbage bits that probably have little meaning in most situations).

Bit 31 is more-or-less ** the complement of Bit 30 under normal conditions when the input is inside the normal operating range** ($-0.5\cdot V_{REF} \lt V_{IN} \lt 0.5\cdot V_{REF}$). If bit 30/31 are the same and the result bits are as shown in table 3 (all zeros with both high, or all 1s with both low), you know the input is larger or smaller than the reference voltage (overrange condition).

Oftentimes that would indicate a broken sensor or similar issue so you'd want to deal with it appropriately.

** except for a possible difference right at zero input.

So, your 25 bit signed result can be had by left-shifting the 32-bit number by one bit and masking out the least significant (now) 7 bits.

The least significant 6 bits are going to be pretty much all noise, but if you're doing calculations in double precision or 64 bit biased fixed point, it probably doesn't cost anything extra to use them (you can consider the result as a 31 bit signed number once you left-shift it). ENOB (Equivalent Number of Bits) of most ADCs is not better than about 20, bits and that's under ideal conditions.

• Thank you for your reply. So, 24 bits + sign means that I have 24 bits between 0V and +Vref, and 24 bits between -Vref and 0V? Then, what is the role of the 6 bits LSB ? Why use bits 30 to 0? Why not divide by 2^24 instead of 2^31? The two complement of a 24 bits number should be a 24 bits number? – PeterG Feb 22 '14 at 22:12
• Hope I answered completely in my edit. It's a 25 bit number, not 24 bit, in "2's complement representation". Where +FS = 0b0111111111111111111111111, and -FS = 0b10000000000000000000000000. – Spehro Pefhany Feb 22 '14 at 22:24
• Very interesting. It means you have a choice between twos complement and offset binary. I'm not sure how useful that is, but the bits are there, so they included the feature – Scott Seidman Feb 23 '14 at 12:56

Bit 31 is a sign bit = here it is HIGH if the voltage measured is positive (>= 0V ) otherwise it is LOW. It's not part of the actual value. Hence the x ^= 0x80000000;, it clears this bit from the read value.

Let's say you plug a 1.5V battery on your sensor input, with + connected to the Vin+ pin, this bit will be HIGH. Then switch the battery sides : connect the + pole to the Vin- pin, bit31 will be LOW.

Regarding bit 30, the important part is If both bits are LOW, the input voltage is below –FS and the following 24 bits are set to HIGH to indicate an underrange condition so you just need to check these two possibilities, then look after bits 29 to 6 that are the interesting 24 bits of your result.

I must admit that the The remaining six bits are Sub LSBs below the 24-bit level part is a little obscure. Probably it is meaningless noise ?

• Thank you for your reply. Well, I am also lost with the LSB. They seem to use 31 bits in the code example… And when reading data from the chip, the LSB contains values. – PeterG Feb 22 '14 at 22:14
• As @Spehro Pefhany seems to confirm, it is noise, I would not worry about it. I'm not fluent in I2C, but if it uses bytes, and the chip uses a total of 26bits (24bits for data + those 2 extra bits for sign and MSB) they had to put these 6 bits as padding anyway. – FredP Feb 22 '14 at 22:24
• Lots of $\Delta\Sigma$ converters have the garbage below LSB output bits provided. They're almost meaningless. Maybe useful for a random number generator seed or something like that. – Spehro Pefhany Feb 22 '14 at 22:27

To address your question about which bits are which, I think the datasheet is pretty clear. Whenever you do a I2C read cycle, you read 32 data bits (4 bytes), and those bits are the bits that are listed left-to-right in Table 3.

The way you know a conversion is ready is whether or not the device ACKs the address byte.