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What would be the diagram of following logic gate function by using NAND and NOR IC’s?

F = AB + BC + AC.

Kindly help how to draw its logic diagram?

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    \$\begingroup\$ The drawing is the easy part - first you need to apply Boolean identities to transform it to use NAND and NOR. Specifically, take a look at De Morgan's law. \$\endgroup\$ – Chris Laplante Feb 27 '14 at 19:28
  • \$\begingroup\$ For you its easy but not for me. How much NAND and NOR hates would be used?Would the two inputs be taken as common? \$\endgroup\$ – user3351862 Feb 27 '14 at 19:42
  • \$\begingroup\$ Why use NAND and NOR - AND and OR are simpler \$\endgroup\$ – Andy aka Feb 27 '14 at 19:43
  • \$\begingroup\$ @user3351862: Again, the answer to those two questions will be immediately apparent once you apply De Morgan's law. \$\endgroup\$ – Chris Laplante Feb 27 '14 at 19:45
  • \$\begingroup\$ @Andyaka: Probably it's an academic exercise to show that any combinatorial circuit can be implemented with NANDs, NORs, and inverters \$\endgroup\$ – Chris Laplante Feb 27 '14 at 19:46
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It's not that hard, you just have to apply De Morgan's transformations, as mentioned in the comments.

Take this into account:

  • \$ \overline{\overline{A}} = A \$.

  • \$ \overline{A+B} = \bar A \cdot \bar B \$ and viceversa

  • \$ \overline{A \cdot B} = \bar A + \bar B \$ and viceversa

From that you only need to apply these transformation until you get the result you want.

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for NAND gate implementation...

schematic

simulate this circuit – Schematic created using CircuitLab

for NOR gate implementation

schematic

simulate this circuit

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