I'm trying to output a slow clock (4kHz) on an I/O from the STM32F0. I'm wondering what the advantage is (if any) of using one of the timer pins to output this clock vs toggling another GPIO on the timer interrupts.

I was thinking I could do PWM mode with 50% duty cycle if I use a timer pin but I could also just as easily toggle any I/O each time the timer interrupt triggers an update.

  • \$\begingroup\$ If the timer pin can be set to toggle the pin forever with no further intervention, you're saving having to execute code to change the pin. OK it's not a huge saving, but it does mean the pin won't be affected by other code, interrupts, etc. \$\endgroup\$
    – John U
    Commented Feb 28, 2014 at 16:59

1 Answer 1


A timer interrupt will have significant jitter, unless it is the only interrupt source/handler in the entire system. Clocked devices typically do not behave well when the clock is jittery. Thus, I would personally use a 50% PWM timer instead of a software-generated pulse train, when all I know about the other devices is that it's a "clocked device."

If there's some reason that it's OK for the clock to have jitter on the order of whatever your worst interrupt latency/jitter is, then you could go with either option, although the PWM clearly has less moving parts and thus is less likely to break. Software is not to be trusted if you can do it in hardware :-) (And I say this as a software engineer)


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