I am a novice when it comes to electrical engineering and I have a very basic question concerning the operation of RS latches:
I am currently working my way through Roth/Kinney's Fundamentals of Logic Design and I have some problems understanding the part describing the operation of RS latches. The book gives this table for the states of RS latches where Q^+ = R'S + R'Q and P = S'Q' and the stable states of the latch are circled:
Now, how comes that for SR = 01, Q = 1 and SR = 10, Q = 0 the latch does not end up in a stable states. I thought that that as long as SR != 11 the latch always ends up in a stable state.
Also, for SR = 11, Q = 0, how can the latch end up in a stable state. I thought that setting SR to 11 is forbidden and the latch state is undefined for this input combination.
Can anybody clarify that for me?