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My understanding of a D flip flop is that when the clock is high and D=1, it sets Q to 1. If D=0, Q is set to 0. So it is like a set to 1 if D=1 and reset to 0 otherwise.

The table repeatedly given in my book is:

D CLK Q QN
0 High 0 1
1 High 1 0
x 0  (last Q) (last QN)
x 1  (last Q) (last QN)

The book is: John F Wakerly, Digital Design Principles and Practices.

It repeatedly reuses this table when describing negative edge/enable flip flops. It seems like it is doing a T flip flop, basically. But it defines T flip flop later too.

Am I misunderstanding D flip flop? Why does the book differ from other sources?

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You mention that the table looks like a T flip flop. Is it possible you are interpreting the table incorrectly?

I believe the "QN" column represents "Q NOT", where the "Q" column is the value of Q resulting from the specific input. In this case, the table correctly represents the behavior of a D flip flop.

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  • \$\begingroup\$ You're right, I thought QN was 'Q Next', not Q complement. Thank you! \$\endgroup\$ – user2666425 Mar 9 '14 at 18:04
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"My understanding of a D flip flop is that when the clock is high and D=1, it sets Q to 1."

Not exactly. The D-FF is edge triggered, so when the clock transitions from low to high whatever is on the D input will be clocked to the Q output. If the clock is just high, then the Q output will not change no matter what the D input is doing. "

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  • \$\begingroup\$ What John said. What @user2666425 describes is a "transparent (high) latch". When the enable input is high, whatever is on the input gets passed to the output. \$\endgroup\$ – Spehro Pefhany Mar 9 '14 at 2:32
  • \$\begingroup\$ I learned what I stated in my post from here: cs.umd.edu/class/spring2003/cmsc311/Notes/Seq/flip.html Is it incorrect, or am I misunderstanding something else? Doesn't it differ from my book? \$\endgroup\$ – user2666425 Mar 9 '14 at 3:08
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I am not sure I understand your question but perhaps this will help clear up the confusion. If the book says otherwise you are probably misreading something. Your basic understanding of the a D flip flop is correct. A D flip flop has the following table:

enter image description here

Where Q is the state just as the clock rises and Q+ is the state a small amount time after. As you mentioned the D flip flop basically mirrors the input on the output. The table below is the T flip flop:

enter image description here

As you can see the T flip flop toggles it's state whenever the input is transitions high (different from the D flip flop).

A negative edge flip flop is the same as a standard flip flop except that it looks for a falling edge to assert it's output (instead of a positive edge).

An enable flip flop is any flip flop with an extra input that basically turns it off and on. If enable is high then the enable flip flop acts like a regular flip flop. If enable is low the enable flip flop simply outputs the last value of Q regardless of changes in D.

If this doesn't help please upload a picture of the specific page that is confusing you and maybe we can help.

Images are taken from here: http://www.cs.umd.edu/class/spring2003/cmsc311/Notes/Seq/flip.html

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  • \$\begingroup\$ John D also makes a good point. Flip flops look for edges. If the clock is constantly held high or low nothing will happen. \$\endgroup\$ – EasyOhm Mar 9 '14 at 2:36
  • \$\begingroup\$ imgur.com/r2doRWY Here's the first instance of the book mentioning the flip flop. \$\endgroup\$ – user2666425 Mar 9 '14 at 3:48
  • \$\begingroup\$ I figured it out, I thought that 'QN' from the book was like 'Q+' from the webpage. Instead, it was the complement, not the 'next' value of Q. Thank you. \$\endgroup\$ – user2666425 Mar 9 '14 at 18:04
  • \$\begingroup\$ Congrats, good job! \$\endgroup\$ – EasyOhm Mar 9 '14 at 23:14

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